Current divider mirror
in [Design]
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From: Fred Bartoli on 8 Feb 2010 19:11 Jim Thompson a �crit : > On Tue, 09 Feb 2010 00:40:45 +0100, Fred Bartoli <" "> wrote: > >> Jim Thompson a �crit : >>> On Mon, 08 Feb 2010 14:23:44 -0800, John Larkin >>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>> [snip] >>>> Putting two or three or seventeen transistors in parallel in a circuit >>>> like this doesn't scale the mirror ratios, it just sort of half-assed >>>> averages out the betas. If there is a 2:1 ratio, it's because the NPNs >>>> have an average beta twice that of the PNPs. >>>> >>> [snip] >>>> Next problem? >>>> >>>> John >>> John Larkin's statement there is SO-DUMBASSED as to warrant special >>> mention ;-) Keep note of that! >>> >>> The only thing that stands out as defective in the schematic is that >>> the placement of the two 1N914's is wrong to accomplish the desired >>> up/down current steering. >>> >> ??? Not even, but the schmidt trigger has wrong feedback (take it from >> the other 3904 collector). > > Yep, the real defect is the Schmitt. Swapping phase still doesn't fix > it. I can't figure out what was the intent of whoever designed this. > Hmmm, look harder... >> And the 100p miller cap is not only >> unnecessary but worsens the PSRR without any benefit. > > Have no idea why people spray capacitors around ;-) > >> It seems your silicon has one unnecessary pass. > > My "silicon"? Those GenRad supplies used everything off-the-shelf. > I meant that "virtual one" when you said: >>> The only thing that stands out as defective in the schematic is that >>> the placement of the two 1N914's is wrong to accomplish the desired >>> up/down current steering. -- Thanks, Fred.
From: Jim Thompson on 8 Feb 2010 19:34 On Tue, 09 Feb 2010 01:11:00 +0100, Fred Bartoli <" "> wrote: >Jim Thompson a �crit : >> On Tue, 09 Feb 2010 00:40:45 +0100, Fred Bartoli <" "> wrote: >> >>> Jim Thompson a �crit : >>>> On Mon, 08 Feb 2010 14:23:44 -0800, John Larkin >>>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>> [snip] >>>>> Putting two or three or seventeen transistors in parallel in a circuit >>>>> like this doesn't scale the mirror ratios, it just sort of half-assed >>>>> averages out the betas. If there is a 2:1 ratio, it's because the NPNs >>>>> have an average beta twice that of the PNPs. >>>>> >>>> [snip] >>>>> Next problem? >>>>> >>>>> John >>>> John Larkin's statement there is SO-DUMBASSED as to warrant special >>>> mention ;-) Keep note of that! >>>> >>>> The only thing that stands out as defective in the schematic is that >>>> the placement of the two 1N914's is wrong to accomplish the desired >>>> up/down current steering. >>>> >>> ??? Not even, but the schmidt trigger has wrong feedback (take it from >>> the other 3904 collector). >> >> Yep, the real defect is the Schmitt. Swapping phase still doesn't fix >> it. I can't figure out what was the intent of whoever designed this. >> > >Hmmm, look harder... > > >>> And the 100p miller cap is not only >>> unnecessary but worsens the PSRR without any benefit. >> >> Have no idea why people spray capacitors around ;-) >> >>> It seems your silicon has one unnecessary pass. >> >> My "silicon"? Those GenRad supplies used everything off-the-shelf. >> > >I meant that "virtual one" when you said: > >>> The only thing that stands out as defective in the schematic is that > >>> the placement of the two 1N914's is wrong to accomplish the desired > >>> up/down current steering. Ah! That was my off-the-top vision before realizing the Schmitt was bass-ackwards (or I guess the diodes could be considered bass-ackwards :-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
From: John Larkin on 8 Feb 2010 21:40 On Tue, 09 Feb 2010 00:40:45 +0100, Fred Bartoli <" "> wrote: >Jim Thompson a �crit : >> On Mon, 08 Feb 2010 14:23:44 -0800, John Larkin >> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >> [snip] >>> Putting two or three or seventeen transistors in parallel in a circuit >>> like this doesn't scale the mirror ratios, it just sort of half-assed >>> averages out the betas. If there is a 2:1 ratio, it's because the NPNs >>> have an average beta twice that of the PNPs. >>> >> [snip] >>> >>> Next problem? >>> >>> John >> >> John Larkin's statement there is SO-DUMBASSED as to warrant special >> mention ;-) Keep note of that! >> >> The only thing that stands out as defective in the schematic is that >> the placement of the two 1N914's is wrong to accomplish the desired >> up/down current steering. >> > >??? Not even, but the schmidt trigger has wrong feedback (take it from >the other 3904 collector). And the 100p miller cap is not only >unnecessary but worsens the PSRR without any benefit. > It's probably trying to stop Q1 from oscillating. It probably doesn't. John
From: John Larkin on 8 Feb 2010 21:44 On Mon, 8 Feb 2010 18:08:12 -0600, "Tim Williams" <tmoranwms(a)charter.net> wrote: >"Fred Bartoli" <" "> wrote in message >news:4b70a0fd$0$21600$426a74cc(a)news.free.fr... >> ??? Not even, but the schmidt trigger has wrong feedback (take it from the >> other 3904 collector). > >Indeed! Then the 4.7k positive feedback is actually positive. > >That's ONE error. Come on, can't you so-called professionals do better than >this? ;-D > >Tim Reference designators would help! You could eliminate the dual diode and just let the upper PNP kill the + side current source, with suitable shuffling. Saves some parts and power. The behavior of Q1 versus pot rotation is interesting. John
From: Tim Williams on 8 Feb 2010 23:05
"Spehro Pefhany" <speffSNIP(a)interlogDOTyou.knowwhat> wrote in message news:shl1n5hhubvi18ucbr23s3vl17599n8nvl(a)4ax.com... > Didn't. It was a bit different because it was a linear IC design so > the emitter resistors were not required to gobble up potential Vbe > mismatch, and I shut off the |2*I| current source with a saturated > transistor across the Vbe junction. It worked fine when built on a > breadboard with monolithic transistor arrays. I did that in an even earlier drawing (which I don't think I ever breadboarded, actually), http://webpages.charter.net/dawill/tmoranwms/Circuits_2008/Function_Generator.gif but turning off transistors slows things down. Nice part about diode gates, they are basically instantaneous. Tim -- Deep Friar: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms |