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From: al99999 on 6 Nov 2006 09:22
Hi everyone,

I am trying to add a USB 480Mbps interface to my fpga design which will
stream data in one direction only from the FPGA to PC.

The avnet evaluation board I have has the Cypress 68013 chip.

Can anybody point me in the right direction of where to start (or which
is the most suitable application note on the cypress website), and if
there is any sample cores to embed on the fpga.

Thanks very much,

Al

From: Will Dean on 6 Nov 2006 09:36
"al99999" <alastairlynch(a)gmail.com> wrote in message
news:1162822979.389980.211390(a)h54g2000cwb.googlegroups.com...
>
> The avnet evaluation board I have has the Cypress 68013 chip.
>
> Can anybody point me in the right direction of where to start (or which
> is the most suitable application note on the cypress website), and if
> there is any sample cores to embed on the fpga.

Use the 'slave fifo' interface of the 68013.
Use it in one of its synchronous modes. (I tend to clock the FPGA off the
48MHz clock from the 68013).
After that, it's really simple, provided you've set the 68013 up correctly -
you watch the appropriate 'fifo-full' flag from the 68013 and drive data in
accordingly. You need the technical reference manual for the 68013 (FX2),
not just the datasheet. (Both from Cypress' TERRIBLE website)

You will probably find that the PC is a bottleneck, particularly if you
don't make an effort to keep lots of overlapped reads queued on to the USB
driver.

If you've never done anything with USB or device drivers before, start with
the Cypress "USB developer uStudio" or whatever they call it (CY4604) - the
CyUSB.sys generic driver. I can never find it on their TERRIBLE website,
but it's there somewhere.

The FPGA -> FX2 link is trivial. The rest of the development might be
harder.

Will



From: eric on 7 Nov 2006 02:54
al99999 schrieb:
> Hi everyone,
>
> I am trying to add a USB 480Mbps interface to my fpga design which will
> stream data in one direction only from the FPGA to PC.
>
> The avnet evaluation board I have has the Cypress 68013 chip.
>
> Can anybody point me in the right direction of where to start (or which
> is the most suitable application note on the cypress website), and if
> there is any sample cores to embed on the fpga.
>
> Thanks very much,
>
> Al
>
Have you thought about the Xilinx ML403 with Gigabit Ethernet.
There is a solution called GSRD with Jumboframes. You can get about
500Mbits/s via socket communication with PC. And i made a monta vista
linux run on PowerPC in Virtex 4.

This could also be a solution if your not fixed to USB.

Eric
From: al99999 on 7 Nov 2006 08:58
Thanks very much, I'll try this and see what I can do.

Al

> Use the 'slave fifo' interface of the 68013.
> Use it in one of its synchronous modes. (I tend to clock the FPGA off the
> 48MHz clock from the 68013).
> After that, it's really simple, provided you've set the 68013 up correctly -
> you watch the appropriate 'fifo-full' flag from the 68013 and drive data in
> accordingly. You need the technical reference manual for the 68013 (FX2),
> not just the datasheet. (Both from Cypress' TERRIBLE website)

> If you've never done anything with USB or device drivers before, start with
> the Cypress "USB developer uStudio" or whatever they call it (CY4604) - the
> CyUSB.sys generic driver. I can never find it on their TERRIBLE website,
> but it's there somewhere.
>
> The FPGA -> FX2 link is trivial. The rest of the development might be
> harder.

From: al99999 on 23 Nov 2006 07:19
Hi,

I have now written a program to initialise the 68013 to slave fifo
mode, but I am struggling to find any tutorials on how to program this
onto the 68013 and test it. If for example I wished to write to a
memory location on the 8051 and then read it back how could I do this.

Thanks again,

Al

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