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From: Tim Wescott on 14 Dec 2009 10:06
On Mon, 14 Dec 2009 07:22:53 -0600, rseb wrote:

>>Another possibility: If an asymmetrical signal goes out of the range of
>>the ADC on either the positive or negative peaks then the resulting
>>digital signal will have a DC offset.
>
> John, Could you explain how this will happen? Thanks
> RSeb

ADCs have input ranges, and a too-positive or too-negative input voltage
exceeds this range. A well-behaved ADC will, when this happens, saturate
high or low, effectively clipping the waveform. (There are poorly
behaved ADCs out there, some may deliver random results on overload, some
may just go into CMOS lockup and crowbar the board's power supply to
nothing).

If you have a waveform that has a DC value of zero, but which has
positive-going peaks that are much higher than it's negative-going peaks,
and the ADC range goes equally positive and negative, then the ADC may
clip the positive-going peaks but not the negative-going peaks.

What effect will this have on the average value of the waveform as
sampled by the ADC?

--
www.wescottdesign.com
From: Rob Gaddi on 14 Dec 2009 12:47
On Mon, 14 Dec 2009 07:20:32 -0600
"rseb" <reny.sebastian(a)gmail.com> wrote:

> Thanks Michael and John for the answers.
> I also want to understand how ADC does it's job. If the analog signal
> amplitude is in the range +5V to 0V which voltage ADC take as
> 0(digital). Will it be 2.5V ?
>
>

Depends on the ADC, and whether it's a) unipolar or bipolar and b)
reporting data in two's compliment or offset binary.

Go read some datasheets; you're trying to grasp abstract concepts in a
concrete world. The AD7792, ADS8317, and LTC2261 are interesting
places to start, they're all fairly modern parts that I mention simply
because they're in my saved datasheets folder. Finding them is left as
an exercise for the reader, your first hint rhymes with Loogle.

Given where you are in this process, start by going through and reading
the text descriptions, then go back and look at the sorts of things that
are in the spec charts.

--
Rob Gaddi, Highland Technology
Email address is currently out of order
From: Jerry Avins on 14 Dec 2009 13:04
rseb wrote:
> Thanks Michael and John for the answers.
> I also want to understand how ADC does it's job. If the analog signal
> amplitude is in the range +5V to 0V which voltage ADC take as 0(digital).
> Will it be 2.5V ?

It depends on the part. Look at the spec sheet. Some, unipolar
(one-sided) ADCs, return 0 for 0V in and MAX for say 5V in. Adding a DC
offset to the input by any analog means produces an output in the form
of offset binary. Inverting the most significant bit converts that to
two's-complement binary.

I don't expect that you'll understand all that at first reading, but
you'll be well ahead for doping it out. Ask for details if you need to.

Jerry
--
Engineering is the art of making what you want from things you can get.
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From: John Monro on 14 Dec 2009 16:31
Tim Wescott wrote:
> On Mon, 14 Dec 2009 07:22:53 -0600, rseb wrote:
>
>>> Another possibility: If an asymmetrical signal goes out of the range of
>>> the ADC on either the positive or negative peaks then the resulting
>>> digital signal will have a DC offset.
>> John, Could you explain how this will happen? Thanks
>> RSeb
>
> ADCs have input ranges, and a too-positive or too-negative input voltage
> exceeds this range. A well-behaved ADC will, when this happens, saturate
> high or low, effectively clipping the waveform. (There are poorly
> behaved ADCs out there, some may deliver random results on overload, some
> may just go into CMOS lockup and crowbar the board's power supply to
> nothing).
>
> If you have a waveform that has a DC value of zero, but which has
> positive-going peaks that are much higher than it's negative-going peaks,
> and the ADC range goes equally positive and negative, then the ADC may
> clip the positive-going peaks but not the negative-going peaks.
>
> What effect will this have on the average value of the waveform as
> sampled by the ADC?
>
RSeb, to expand on that last point of Tim's:

Let's say that we have an analog test-signal which is
periodic and asymmetrical. Assume that the positive peaks
have a higher amplitude than the negative peaks.

If the signal samples are all within the range of the ADC
and assuming we take sums over exactly one period in time:
The sum of all the positive samples out of the ADC will
equal the sum of all the negative samples.
The average will be zero and so there will be zero DC component.

If one or more of the positive samples are clipped by the ADC:
The sum of the positive samples will now be less than before.
The average will now be negative so there will now be a
negative DC component present.

Regards,
John

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