DC Offset
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From: rseb on 13 Dec 2009 15:52 I have a few questions. Hope you can help me on this. How DC Offset is introduced in a digital signal? Is it introduced by analog front-end or by ADC? Also please explain me is it possible for ADC to determines the analog signal mean? Regards, RSeb.
From: John Monro on 13 Dec 2009 19:26 rseb wrote: > I have a few questions. Hope you can help me on this. How DC Offset is > introduced in a digital signal? Is it introduced by analog front-end or by > ADC? Also please explain me is it possible for ADC to determines the analog > signal mean? > > Regards, > RSeb. > > > A DC imbalance in the analog front-end or in the ADC will cause an offset in the digital signal, and the DC will be independant of signal level. Another possibility: If an asymmetrical signal goes out of the range of the ADC on either the positive or negative peaks then the resulting digital signal will have a DC offset. In this case the DC disappears for low-amplitude signals. Regards, John
From: Michael Plante on 14 Dec 2009 01:57 >Also please explain me is it possible for ADC to determines the analog >signal mean? Why not determine it digitally? If you just want to remove the offset, you might look at AC coupling. Also, some ADCs have built-in offset removal. One I've examined closely doesn't explicitly say, but it appeared it probably subtracted the result of a very strong digital low pass filter (the startup time was probably equivalent to about 100k samples), as it provides the current mean value in a register, regardless of whether you've enabled the removal of that mean. Another question you'll have to answer is "how long do I average for"? Depending on the precision you need, your mean may vary over time.
From: rseb on 14 Dec 2009 08:20 Thanks Michael and John for the answers. I also want to understand how ADC does it's job. If the analog signal amplitude is in the range +5V to 0V which voltage ADC take as 0(digital). Will it be 2.5V ?
From: rseb on 14 Dec 2009 08:22 >Another possibility: If an asymmetrical signal goes out of >the range of the ADC on either the positive or negative >peaks then the resulting digital signal will have a DC >offset. John, Could you explain how this will happen? Thanks RSeb
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