From: Scott M. Kroll on 7 Mar 2006 21:23 Well, I'm not sure if anyone here has had the same problem, but I have, and it has been driving me nuts. My primary machine is a laptop, which has no parallel port, so I am stuck with USB. Also, I am in a class where we are doing projects using the Spartan-3 Starter Kit from Digilent. Since I have no parallel port, I have been using Digilent's JTAG-USB cable, which, for the most part, works great. However, there are two problems. 1. You cannot use Xilinx IMPACT to program the Spartan-3 2. The external SRAM does not work when using a .bit file Well, #2 seems awfully strange. I know it did for me, I thought I was having a problem with VHDL, and that's why I thought it wasn't working. Well, I spent a long time tinkering with it over our winter break (I know, I know, but it's what I did) and just today I came up with the solution. A little explanation for this is probably needed. Basically, anything I write and compile in IMPACT would work fine. LEDs light up, the 7-segment display works fine, everything I've done works great. However, every time I tried to write to the SRAM, nothing changed, I simply got back garbage/random data. Every time, no questions asked, it just didn't work. To make a long story short, here's a solution I discovered (which, is a whole another story to how I figured it out). 1. Start IMPACT 2. Edit -> Add Device -> Xilinx Device 3. Loaded c:\Program Files\Xilinx\spartan3\data\xc3s200_ft256.bsd 4. Right-Clicked Device, Assigned Configuration File 5. Mode -> File Mode 6. Clicked SVF-STAPL-XSVF tab, clicked "Yes" when it asked to load from Boundary Scan 7. Chose to generate a new SVF file, named it 8. Right-Clicked Device, chose Program. 9. Output -> SVF -> Stop Writing to SVF File 10. Quit Impact 11. Started Export, did Device Scan, loaded SVF into the xc3s200, set the prom to bypass, hit program. Everything worked right. Seems like a strange solution, but what I want to know, has anyone here had a problem like this? I have a feeling that loading a different .BSD file for other Xilinx chips should work just as well with the JTAG-USB cable/Digilent's ExPort software, but I couldn't tell you. Hope this helps people out. If anyone wants to contact me with any more information via email, please use: skroll at gmail dot com
From: Hendra on 7 Mar 2006 23:29 I don't know about your particular problem, but with regard to the parallel port, you can buy a PCMCIA to Parallel port converter. http://www.quatech.com/catalog/parallel_pcmcia.php They should work for any FPGA board that needs parallel port since the converter works at lower hardware level and it fools the operating system to think that it really has a parallel port. From the device manager, it would appear that you really have a native parallel port. If you buy it , make sure you got rev. F or later. It fixed incompatibility problem with some newer laptop. If you have the earlier rev, contact them for the RMA and they will exchange it for you. Hendra
From: Antti on 8 Mar 2006 02:30 #1 there is no way (til today) to create impact compatible 3rd party programmers other than those that are cable III compliant, (unless usb platform cable is integrated fully in the design) - hence the digilent cable is not supported by impact #2 this what I dont understand - FPGA and all connected stuff (SRAM whatever) will work same way no matter what means are used to configure the FPGA given the FPGA is really configured properly. So configuring the FPGA with .bit file using impact or SVF file and some 3rd party tool, should get the FGPA into same working condition. If you had some trouble then its must some trick bug of the digilient export software I guess btw jtag config is a bit tricky, namly it is possible have DONE=1 when FPGA is not configured at all etc.. Antti
From: Hendra on 8 Mar 2006 06:38 Antti wrote: > btw jtag config is a bit tricky, namly it is possible have DONE=1 when > FPGA is not configured at all etc.. One thing that I frequently see in some Xilinx FPGA boards is when you got an error like Done is not high or something like that, you should unplug the power cable, replug it and reprogram the board. If it still doesn't work, unplug the parallel cable or whatever connection you have as well. Hendra
From: Brian Davis on 8 Mar 2006 07:31 Scott M. Kroll wrote: > > 2. The external SRAM does not work when using a .bit file > Could you clarify exactly what you mean here; are you using the Digilent JTAG utility to program the on-board prom, or to directly configure the FPGA via JTAG? One thing I've seen with IMPACT generated SVF files on both V2P's and the S3 starter kit, is the need for one last JTAG operation to "wake up" the part. IIRC, in the Digilent tool, after loading the FPGA with the config PROM in BYPASS, just try a device id on the config PROM and see if that fixes it. Also, I think I've had to change the JP1 bitstream readback jumper setting to "disable" to get consistent results for JTAG download; you may also want to change the configuration mode jumpers to "JTAG" If the DCM doesn't start up after re-configuration, your static logic would work but any DCM clocked logic would not: Answer Record 11778: "Virtex/-E/-II/-II Pro, Spartan-II/-IIE/-3 - Device configures correctly after PROG is pulsed, but DLL/DCM/DCI does not function correctly when reconfigured" Similar things can happen if the part almost, but not quite, finishes configuration and ends up in a configured state with GSR or GTS still asserted. To help sort out what is happening, create a test design with: - an LED driven from a switch input (no registers) - a blinky LED counter driven from the input clock WITHOUT a DCM - a blinky LED counter driven from a DCM sourced clock - LED's on DCM LOCKED and "clock stopped" status bit Brian
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