EMC discussion
in [FPGA]
|
From: Symon on 25 Mar 2010 12:12 On 3/25/2010 4:03 PM, austin wrote: > Thomas, > > Some thoughts: > >> 1. Filtering of IC-supply-voltage >> While it is quite standard to filter e.g. the PLL-supply voltages of a >> FPGA, there are some suggestions to filter the supply-voltage of every >> IC (CPU, FPGA, memory, ...) on the PCB with a ferrite-bead + C. >> (Consequently, this also means that every IC has it's own Vdd-island >> in the power-plane.) Does this work? > > You must be using a non-Xilinx device: our requirements are clearly > spelled out in our user's guides. And, we do not require filtering > the supply to our clock tile PLL in V5, V6, nor S6. > It's hard to imagine a board without some non-Xilinx devices on it somewhere. Some of these devices may need isolation from the noise generated by the FPGA. Power islands are a good way to deal with this. Syms.
From: Symon on 25 Mar 2010 12:53 On 3/25/2010 2:55 PM, Andy wrote: > On Mar 24, 8:57 pm, Symon<symon_bre...(a)hotmail.com> wrote: >> 2) Only nutters have power planes. They use up valuable space in which >> you could more profitably use a ground plane. > > Surely you mean "Only nutters have separately filtered power planes > for individual general purpose digital IC supplies." I meant what I said. And don't call me Shirley. > > Otherwise, suggesting that planes (partial or full) are not needed for > power distribution to digital circuitry is ludicrous. In general, and especially in the context of the OP's points about using power planes as signal return paths, I contend that power planes on digital boards are expensive and a waste of time. Indeed, they can be counter productive. There are many power supplies on the board. For example, an FPGA may typically have different supplies on different I/O banks, plus a core supply, plus an DCM/PLL supply. Would you have a plane for every supply? If you use a single PCB layer for two supplies, what happens when a signal on an adjacent layer crosses the gap? What happens when you want to isolate a device from a noisy supply? Far simpler to use the power islands mentioned in the OP, and use multiple ground planes for return paths. > >> If anyone wants to disagree with this advice, I want a specific, first >> person example where what I suggest is wrong. I don't want to hear what >> some 'guru' told you on a course you paid for. :-) > > Why should we supply any more evidence than you have? > Is that the royal 'we'? :-) > Andy > >
From: Andy on 25 Mar 2010 14:04 I agree that power islands, where required, are OK, but it was not clear what your original statement was recommending. Under what circumstances power islands are required is up for debate. Whether they are used as signal shield layers (for HF return currents) is dependent up on the application, whether traces can be routed without crossing between different islands, and whether or not adding additional layers for additional ground planes is a good trade. No sir, I'm just part of the common 'we' (the same group you adressed as 'anyone'). Are you the Royal Symon? Andy
From: John_H on 25 Mar 2010 14:08 On Mar 25, 10:55 am, Andy <jonesa...(a)comcast.net> wrote: > > Otherwise, suggesting that planes (partial or full) are not needed for > power distribution to digital circuitry is ludicrous. Consider: Why do we need power planes? Are we trying to keep the "reference rails" common between chips to a very high degree like we do with our ground planes? Here's an argument: distributed capacitance between the power and ground planes are effective at the very high frequency end where decoupling caps start to loose their effectiveness. Oops! Decoupling at those very high frequencies off-chip doesn't appear to have much effect [guru suggestion] and the larger the plane, the lower the self- resonant frequency of that plane. If you have an 11" board, your quarter wavelength is about 250MHz. Smaller planes are more effective at pushing this high end of resonance out of the picture. Smaller planes means smaller distributed capacitance. I can understand the need for power planes in analog or balanced circuits where the decoupling effects are still prevalent at the discrete level. But for chip level? Maybe not after all. After my most recent board involvement I'm convinced that power distribution would become less problematic with power distributed to small, chip-local islands. The small islands do help distribute the decoupling caps over an area, affecting inter-cap resonance issues. We've come a long way since the wire-wrap days of star configured power and ground distribution. But little attention has been paid to the science behind power distribution. There are tools that have become available in recent years to help plan the power distribution and avoid the troubles with plane resonance or interference between capacitors. The tiny islands might be one of the better ways to go.
From: Kolja Sulimma on 25 Mar 2010 14:08
On 25 Mrz., 02:10, Thomas Entner <thomas.ent...(a)entner- electronics.com> wrote: > 3. Shields of connectors, chassis ground > Most PCBs have one or more connectors with shields (e.g. USB, RJ45, > VGA, RS-232,...) Do you connect these directly to circuit-ground? Or > with C and R in parallel? Or do you have some kind of "frame-ground"? > Have you the mounting holes grounded to the chassis? All or just one? The problem with this is, that for high frequencies and lower frequencies different setups work well. That is why you find conflicting design guids for whether ground and shield should be connected and where they should be connected. Kolja |