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From: Martin Thompson on 18 May 2010 12:45
"Nial Stewart" <nial*REMOVE_THIS*@nialstewartdevelopments.co.uk>
writes:

>> The point is that those assignments *are* used in synthesis by some
>> tools. XST does it for one. It makes no sense for an ASIC, but for
>> FPGAs which have a well defined startup condition defined by the
>> bitstream it makes eminent sense.
>>
>> Now whether you want to take advantage of it depends on how portable
>> to ASIC you want your code to be
>
>
> Or whether you want to have completely unpredictable/broken behaviour
> if you decide to change FPGA vendors!
>

Is it *that* bad across FPGA families? Xilinx and Altera (IIRC) both
support initialisation for registers, Lattice use Synplify, which also
supports it - so that's the vast majority of the FPGA market covered.
It's only if you change to something very niche that it might fall
apart.

But that's the nature of engineering - sometimes you use something
unportable because it gets you where you need to be now. Or you know
where you're never going to have to go. You don't do it more than is
absolutely necessary, and if you're bright you do it in a way that
keeps it isolated so it's easy to swap something else in if it becomes
necessary.

So far I've only needed it for the reset synchroniser anyway...

Cheers,
Martin

--
martin.j.thompson(a)trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html
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