FET gate waveform
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From: Joerg on 18 Feb 2010 13:26 Raveninghorde wrote: > I'm back looking at an on going project. > > http://www.zen88234.zen.co.uk/design/Output-2.png > > I am investigating the dissipation of Q2 the high side FET. The > designers prototype (20 miles away) has an IRLZ44Z. My prototype gas > an 2SK3704 fitted. > > The temperature rise is about the same for both FETs though I expected > about a 10% improvement with the 2SK3704. > > The heatsink is an SW50-4 with a theta of 8.6C per watt. I calculate a > FET dissipation of under 2.5W using the methodology in the LM3150 > datasheet. > > The heatsink rises by about 56C after about 20 minutes at 12V 8A > running at 200kHz. This T rise drops to 47C at 140kHz. > > So I scoped the gate drive with the scope grounded on the source of > Q2. I got this: > > http://www.zen88234.zen.co.uk/photos/IMG_0195.JPG > > I repeated the measurement with my old Iwatsu analog scope and got the > short negative pulse after 100ns but it only goes down to -1V instead > of -3V. > > As a check I scoped the probe's ground point and there is very little > signal there so the probe isn't picking much radiated noise. > > The designer (bro in law) has tried the same measurement using his > Tektronix scope and gets a pulse down to +1V. > > Clearly there is a gate drive issue of some sort. > > The IRLZ44Z has a max Rdson of 0.02 at 25C and 5V. The typical gate > drain charge is 12nC. > > The 2SK3704 has a max Rdson of 0.021 at 25C and 4V. The typical gate > drain charge is 10nC. > Now don't shoot the messenger. The LM3150 has an internal regulator to 6V, of course minus the drop of the bootstrap diode, minus whatever other losses in there, see page 6: http://cache.national.com/ds/LM/LM3150.pdf That's a bit wimpy for a FET like this. It would be better to drive those with more gusto, like 10-12V. I will never understand why manufacturers put such lowish voltages on the gate drivers, makes no sense at all. The Schottky MooseFet suggested is also well advised. Next time I suggest to get a better chip where you can bypass the <expletive censored> internal LDO and feed it some real VCC. 12V or so. LTC has some better ones there. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: Raveninghorde on 18 Feb 2010 13:43 On Thu, 18 Feb 2010 10:26:08 -0800, Joerg <invalid(a)invalid.invalid> wrote: >Raveninghorde wrote: >> I'm back looking at an on going project. >> >> http://www.zen88234.zen.co.uk/design/Output-2.png >> >> I am investigating the dissipation of Q2 the high side FET. The >> designers prototype (20 miles away) has an IRLZ44Z. My prototype gas >> an 2SK3704 fitted. >> >> The temperature rise is about the same for both FETs though I expected >> about a 10% improvement with the 2SK3704. >> >> The heatsink is an SW50-4 with a theta of 8.6C per watt. I calculate a >> FET dissipation of under 2.5W using the methodology in the LM3150 >> datasheet. >> >> The heatsink rises by about 56C after about 20 minutes at 12V 8A >> running at 200kHz. This T rise drops to 47C at 140kHz. >> >> So I scoped the gate drive with the scope grounded on the source of >> Q2. I got this: >> >> http://www.zen88234.zen.co.uk/photos/IMG_0195.JPG >> >> I repeated the measurement with my old Iwatsu analog scope and got the >> short negative pulse after 100ns but it only goes down to -1V instead >> of -3V. >> >> As a check I scoped the probe's ground point and there is very little >> signal there so the probe isn't picking much radiated noise. >> >> The designer (bro in law) has tried the same measurement using his >> Tektronix scope and gets a pulse down to +1V. >> >> Clearly there is a gate drive issue of some sort. >> >> The IRLZ44Z has a max Rdson of 0.02 at 25C and 5V. The typical gate >> drain charge is 12nC. >> >> The 2SK3704 has a max Rdson of 0.021 at 25C and 4V. The typical gate >> drain charge is 10nC. >> > >Now don't shoot the messenger. The LM3150 has an internal regulator to >6V, of course minus the drop of the bootstrap diode, minus whatever >other losses in there, see page 6: > >http://cache.national.com/ds/LM/LM3150.pdf > >That's a bit wimpy for a FET like this. It would be better to drive >those with more gusto, like 10-12V. I will never understand why >manufacturers put such lowish voltages on the gate drivers, makes no >sense at all. > >The Schottky MooseFet suggested is also well advised. > >Next time I suggest to get a better chip where you can bypass the ><expletive censored> internal LDO and feed it some real VCC. 12V or so. >LTC has some better ones there. I've already kicked my brother in law for choosing it. I didn't check the data myself until we first had problems with a non logic level FET. I must admit I felt this was the easy part of the job and was more concerned with the offline pre regulator. As you say why does anyone limit the FET drive to under 6V.
From: Joerg on 18 Feb 2010 14:20 Raveninghorde wrote: > On Thu, 18 Feb 2010 10:26:08 -0800, Joerg <invalid(a)invalid.invalid> > wrote: > >> Raveninghorde wrote: >>> I'm back looking at an on going project. >>> >>> http://www.zen88234.zen.co.uk/design/Output-2.png >>> >>> I am investigating the dissipation of Q2 the high side FET. The >>> designers prototype (20 miles away) has an IRLZ44Z. My prototype gas >>> an 2SK3704 fitted. >>> >>> The temperature rise is about the same for both FETs though I expected >>> about a 10% improvement with the 2SK3704. >>> >>> The heatsink is an SW50-4 with a theta of 8.6C per watt. I calculate a >>> FET dissipation of under 2.5W using the methodology in the LM3150 >>> datasheet. >>> >>> The heatsink rises by about 56C after about 20 minutes at 12V 8A >>> running at 200kHz. This T rise drops to 47C at 140kHz. >>> >>> So I scoped the gate drive with the scope grounded on the source of >>> Q2. I got this: >>> >>> http://www.zen88234.zen.co.uk/photos/IMG_0195.JPG >>> >>> I repeated the measurement with my old Iwatsu analog scope and got the >>> short negative pulse after 100ns but it only goes down to -1V instead >>> of -3V. >>> >>> As a check I scoped the probe's ground point and there is very little >>> signal there so the probe isn't picking much radiated noise. >>> >>> The designer (bro in law) has tried the same measurement using his >>> Tektronix scope and gets a pulse down to +1V. >>> >>> Clearly there is a gate drive issue of some sort. >>> >>> The IRLZ44Z has a max Rdson of 0.02 at 25C and 5V. The typical gate >>> drain charge is 12nC. >>> >>> The 2SK3704 has a max Rdson of 0.021 at 25C and 4V. The typical gate >>> drain charge is 10nC. >>> >> Now don't shoot the messenger. The LM3150 has an internal regulator to >> 6V, of course minus the drop of the bootstrap diode, minus whatever >> other losses in there, see page 6: >> >> http://cache.national.com/ds/LM/LM3150.pdf >> >> That's a bit wimpy for a FET like this. It would be better to drive >> those with more gusto, like 10-12V. I will never understand why >> manufacturers put such lowish voltages on the gate drivers, makes no >> sense at all. >> >> The Schottky MooseFet suggested is also well advised. >> >> Next time I suggest to get a better chip where you can bypass the >> <expletive censored> internal LDO and feed it some real VCC. 12V or so. >> LTC has some better ones there. > > I've already kicked my brother in law for choosing it. I didn't check > the data myself until we first had problems with a non logic level > FET. > Don't kick him too often, your sister might not like that :-) > I must admit I felt this was the easy part of the job and was more > concerned with the offline pre regulator. > > As you say why does anyone limit the FET drive to under 6V. Even logic-level is deceiving. Yeah, they switch alright under DC loads. But dynamically, not. Ramp-up is more sluggish, costs efficiency and some grief with heat. Then when Miller hits you have almost no reserves. You could demonstrate the improvement if you'd roach in a bootstrappable dual driver between LM3150 and FETs. Bypass it well enough. But in the end this looks like a re-layout case :-( -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: Raveninghorde on 18 Feb 2010 17:29 On Thu, 18 Feb 2010 11:20:33 -0800, Joerg <invalid(a)invalid.invalid> wrote: >Raveninghorde wrote: >> On Thu, 18 Feb 2010 10:26:08 -0800, Joerg <invalid(a)invalid.invalid> >> wrote: >> >>> Raveninghorde wrote: >>>> I'm back looking at an on going project. >>>> >>>> http://www.zen88234.zen.co.uk/design/Output-2.png >>>> >>>> I am investigating the dissipation of Q2 the high side FET. The >>>> designers prototype (20 miles away) has an IRLZ44Z. My prototype gas >>>> an 2SK3704 fitted. >>>> >>>> The temperature rise is about the same for both FETs though I expected >>>> about a 10% improvement with the 2SK3704. >>>> >>>> The heatsink is an SW50-4 with a theta of 8.6C per watt. I calculate a >>>> FET dissipation of under 2.5W using the methodology in the LM3150 >>>> datasheet. >>>> >>>> The heatsink rises by about 56C after about 20 minutes at 12V 8A >>>> running at 200kHz. This T rise drops to 47C at 140kHz. >>>> >>>> So I scoped the gate drive with the scope grounded on the source of >>>> Q2. I got this: >>>> >>>> http://www.zen88234.zen.co.uk/photos/IMG_0195.JPG >>>> >>>> I repeated the measurement with my old Iwatsu analog scope and got the >>>> short negative pulse after 100ns but it only goes down to -1V instead >>>> of -3V. >>>> >>>> As a check I scoped the probe's ground point and there is very little >>>> signal there so the probe isn't picking much radiated noise. >>>> >>>> The designer (bro in law) has tried the same measurement using his >>>> Tektronix scope and gets a pulse down to +1V. >>>> >>>> Clearly there is a gate drive issue of some sort. >>>> >>>> The IRLZ44Z has a max Rdson of 0.02 at 25C and 5V. The typical gate >>>> drain charge is 12nC. >>>> >>>> The 2SK3704 has a max Rdson of 0.021 at 25C and 4V. The typical gate >>>> drain charge is 10nC. >>>> >>> Now don't shoot the messenger. The LM3150 has an internal regulator to >>> 6V, of course minus the drop of the bootstrap diode, minus whatever >>> other losses in there, see page 6: >>> >>> http://cache.national.com/ds/LM/LM3150.pdf >>> >>> That's a bit wimpy for a FET like this. It would be better to drive >>> those with more gusto, like 10-12V. I will never understand why >>> manufacturers put such lowish voltages on the gate drivers, makes no >>> sense at all. >>> >>> The Schottky MooseFet suggested is also well advised. >>> >>> Next time I suggest to get a better chip where you can bypass the >>> <expletive censored> internal LDO and feed it some real VCC. 12V or so. >>> LTC has some better ones there. >> >> I've already kicked my brother in law for choosing it. I didn't check >> the data myself until we first had problems with a non logic level >> FET. >> > >Don't kick him too often, your sister might not like that :-) > > >> I must admit I felt this was the easy part of the job and was more >> concerned with the offline pre regulator. >> >> As you say why does anyone limit the FET drive to under 6V. > > >Even logic-level is deceiving. Yeah, they switch alright under DC loads. >But dynamically, not. Ramp-up is more sluggish, costs efficiency and >some grief with heat. Then when Miller hits you have almost no reserves. > >You could demonstrate the improvement if you'd roach in a bootstrappable > dual driver between LM3150 and FETs. Bypass it well enough. But in the >end this looks like a re-layout case :-( A re-layout is not a problem. I'm just trying to get it cool enough so I can get the prototype out in the box so the customer can evaluate. Once I've got an order for a couple of hundred I can replace the LM3150 and fix the problem.
From: Joerg on 18 Feb 2010 19:53
Raveninghorde wrote: > On Thu, 18 Feb 2010 11:20:33 -0800, Joerg <invalid(a)invalid.invalid> > wrote: > >> Raveninghorde wrote: >>> On Thu, 18 Feb 2010 10:26:08 -0800, Joerg <invalid(a)invalid.invalid> >>> wrote: >>> >>>> Raveninghorde wrote: >>>>> I'm back looking at an on going project. >>>>> >>>>> http://www.zen88234.zen.co.uk/design/Output-2.png >>>>> >>>>> I am investigating the dissipation of Q2 the high side FET. The >>>>> designers prototype (20 miles away) has an IRLZ44Z. My prototype gas >>>>> an 2SK3704 fitted. >>>>> >>>>> The temperature rise is about the same for both FETs though I expected >>>>> about a 10% improvement with the 2SK3704. >>>>> >>>>> The heatsink is an SW50-4 with a theta of 8.6C per watt. I calculate a >>>>> FET dissipation of under 2.5W using the methodology in the LM3150 >>>>> datasheet. >>>>> >>>>> The heatsink rises by about 56C after about 20 minutes at 12V 8A >>>>> running at 200kHz. This T rise drops to 47C at 140kHz. >>>>> >>>>> So I scoped the gate drive with the scope grounded on the source of >>>>> Q2. I got this: >>>>> >>>>> http://www.zen88234.zen.co.uk/photos/IMG_0195.JPG >>>>> >>>>> I repeated the measurement with my old Iwatsu analog scope and got the >>>>> short negative pulse after 100ns but it only goes down to -1V instead >>>>> of -3V. >>>>> >>>>> As a check I scoped the probe's ground point and there is very little >>>>> signal there so the probe isn't picking much radiated noise. >>>>> >>>>> The designer (bro in law) has tried the same measurement using his >>>>> Tektronix scope and gets a pulse down to +1V. >>>>> >>>>> Clearly there is a gate drive issue of some sort. >>>>> >>>>> The IRLZ44Z has a max Rdson of 0.02 at 25C and 5V. The typical gate >>>>> drain charge is 12nC. >>>>> >>>>> The 2SK3704 has a max Rdson of 0.021 at 25C and 4V. The typical gate >>>>> drain charge is 10nC. >>>>> >>>> Now don't shoot the messenger. The LM3150 has an internal regulator to >>>> 6V, of course minus the drop of the bootstrap diode, minus whatever >>>> other losses in there, see page 6: >>>> >>>> http://cache.national.com/ds/LM/LM3150.pdf >>>> >>>> That's a bit wimpy for a FET like this. It would be better to drive >>>> those with more gusto, like 10-12V. I will never understand why >>>> manufacturers put such lowish voltages on the gate drivers, makes no >>>> sense at all. >>>> >>>> The Schottky MooseFet suggested is also well advised. >>>> >>>> Next time I suggest to get a better chip where you can bypass the >>>> <expletive censored> internal LDO and feed it some real VCC. 12V or so. >>>> LTC has some better ones there. >>> I've already kicked my brother in law for choosing it. I didn't check >>> the data myself until we first had problems with a non logic level >>> FET. >>> >> Don't kick him too often, your sister might not like that :-) >> >> >>> I must admit I felt this was the easy part of the job and was more >>> concerned with the offline pre regulator. >>> >>> As you say why does anyone limit the FET drive to under 6V. >> >> Even logic-level is deceiving. Yeah, they switch alright under DC loads. >> But dynamically, not. Ramp-up is more sluggish, costs efficiency and >> some grief with heat. Then when Miller hits you have almost no reserves. >> >> You could demonstrate the improvement if you'd roach in a bootstrappable >> dual driver between LM3150 and FETs. Bypass it well enough. But in the >> end this looks like a re-layout case :-( > > A re-layout is not a problem. > > I'm just trying to get it cool enough so I can get the prototype out > in the box so the customer can evaluate. Once I've got an order for a > couple of hundred I can replace the LM3150 and fix the problem. Then the only option I see other than the Schottky fix is to find the power FET with the lowest possible threshold and low enough Rdson. Problem is, most of the modern stuff is going to be borderline for Vds in your case and doesn't come in TO220 or TO247. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM. |