FET gate waveform
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From: Jim Thompson on 23 Feb 2010 20:29 On Tue, 23 Feb 2010 17:09:43 -0800, Joerg <invalid(a)invalid.invalid> wrote: >Fred Bartoli wrote: >> Joerg a �crit : >>> Hammy wrote: >>>> On Fri, 19 Feb 2010 13:59:38 -0800, Joerg <invalid(a)invalid.invalid> >>>> wrote: >>>> >>>> >>>>> Just don't hold your breath with that FET. I don't know why they >>>>> state such long rise/fall and delay times under "Switching >>>>> Characteristics". Maybe too much gate path resistance, doesn't look >>>>> too promising but definitely worth a shot anyhow. >>>> >>>> Those are some pretty beefy FETS. If you want low switching times >>>> your going to have to pay. Even The HUF device you suggested has >>>> similar switching characteristics for almost twice the price. >>>> >>> >>> I didn't suggest those, I suggested to re-do the thing with a better >>> PWM chip, meaning one that can pounce onto the gates with 10V or more :-) >>> >>> >>>> I'm going test that EL cheapo STP55NF06L and see just how fast it can >>>> switch vs the data sheet. >>> >>> Good. I found that switching times in FET datasheets are often not >>> very dependable. I've had some that I could swing a lot faster. >> >> You mean you've not designed according to the datasheet worst case? >> > >No, that I did but then things stayed a lot cooler than planned, a good >thing. > > >> Naughty boy... >> > >Mom said that to me on occasion ... Way back when I was designing off-line switchers (200W), they ran so cool, I had no heat sinks (MJE13000... something or other)... I grabbed a flag to see how cool... they WERE cool, but to the great hilarity of the technicians, they also had around 400V P-P on them :-( ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.
From: Joerg on 23 Feb 2010 20:42 Jim Thompson wrote: [...] > Way back when I was designing off-line switchers (200W), they ran so > cool, I had no heat sinks (MJE13000... something or other)... > > I grabbed a flag to see how cool... they WERE cool, but to the great > hilarity of the technicians, they also had around 400V P-P on them :-( > A couple years ago I designed a laser thingie, switchers on there etc. It ran off 12V and people could think it's innocent but since it generated HV I had big fat warnings on there. In English and Spanish. Guess who was bitten by it? -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: Raveninghorde on 16 Mar 2010 20:26 On Tue, 23 Feb 2010 17:07:21 -0800, Joerg <invalid(a)invalid.invalid> wrote: >Andy wrote: >> I have also measured the current waveform in the drain of the upper >> mosfet. This adds ring to other waveforms, but does show a slope during >> the on time that is consistent with the inductor being approximately its >> specified value. It gets warm, not hot. >> > >A nice linear slope? That really has me puzzled then. > > >> The 1V appears proportionally as the primary power supply voltage is >> increased. >> > >Hmm, can only be two things. A saturating inductor (but you've excluded >that already) or maybe not enough gate drive level and Q2 going into a >wee oscillation your scope can't see. > > >> Unfortunately, the mosfet has been removed and replaced several times, >> and further mods may make the pcb fail. I am reluctant to remove it to >> add a resistor. >> >> The pcb is 4-layer, so has almost unbroken ground and power planes, so >> that supply impedance should not be an issue. There is decoupling with >> two low ESR 1000�F electrolytics, and several X7R ceramic capacitors on >> each side of the drive chip. >> > >There should also be some ceramics across C16 and C21. > > >> I will try to capture another waveform to show detail of the ringing. >> > >That would be good to see. Wish I was there. Then we could fix it and go >to the pub for a McEwan's Heavy afterwards ;-) > > >> On 23/02/2010 23:12, Joerg wrote: >>> Raveninghorde wrote: >>>> On Fri, 19 Feb 2010 14:59:59 -0800, Joerg <invalid(a)invalid.invalid> >>>> wrote: >>>> >>>> SNIP >>>> >>>>> Good. I found that switching times in FET datasheets are often not >>>>> very dependable. I've had some that I could swing a lot faster. So >>>>> it's always best to try, maybe your FETs will indeed do the trick. I >>>>> guess we'll know soon if the UK has parcel service on Saturdays. >>>>> >>>>> [...] >>>> >>>> We are missing something. We have tried 4 different types of FETs >>>> wiith no noticable difference. >>>> >>>> Here are a couple of waveforms. The output stage is now running of the >>>> bench PSU. Exhibit 1 running of 15V >>>> >>>> http://www.zen88234.zen.co.uk/photos/TEK0015.jpg >>>> >>>> Exhibit 2 running off 30V >>>> >>>> http://www.zen88234.zen.co.uk/photos/TEK0014.jpg >>>> >>>> The output is 12V 8A. The scope probe is grounded to positive on the >>>> bottom side of the board on the leg of the drain of the high side FET. >>>> The probe tip is connected to the source of the high side FET, again >>>> on the leg under the board. >>>> >>>> At 15V there is no significant voltage across the FET when switched >>>> on. On 30V you can see there is about 1V across the FET. This would >>>> appear to be the cause of the observed dissipation. >>>> >>>> The voltage drop does not appear to vary with load. It seems to be 1V >>>> at 100mA as well as 8A. Gate drive level is consistent at about 5.5V >>>> at all input voltages. The voltage drop across the FET seems to vary >>>> linearly with input voltage. >>>> >>>> There is no schottky across the low side FET at the moment. Various >>>> diodes have been tried up to a 48CTQ060 which should have a max >>>> forward voltage of 0.4V at 10A. The diode does not affect this problem >>>> but we will try it again when this is solved. >>>> >>>> At the moment I hope someone will say DOH, and point out the obvious >>>> cause of the problem. >>> >>> >>> Wish I could but this is strange. On the 30V case plot you can see a >>> distinct run in from 0V drop to 1V, inside the ringout. It appears to be >>> a 50nsec slope and then "homes in" at 1V. I can't see anything with that >>> time constant in your circuit. Unless, of course, the inductor L5 sits >>> in saturation and the small bit of leakage inductance is responsible. >>> Could L5 be saturating? >>> >>> Would be interesting to see the time base cranked up around this >>> ringout, and zoomed a bit. But even more important would be to know: >>> Does this phenomenon suddenly set one when you crank the input voltage >>> past a certain level or does it gradually rise to 1V while cranking up >>> from 15V in to 30V in? >>> >>> Can you lift the source of Q2, put a few ten milliohms in there and >>> scope the current? The crank up the bench supply voltage and see if any >>> sudden pattern change happens there. >>> >>> My hunch would be inductor core saturation but hard to say from the >>> distance. I'd check for that first. >>> >> There seems to have been some scope artifacts in the measurements which were misleading. The problem appears to be cross conduction due to the miller capacitance of the lower FET switching it on as the upper FET switches on. The supply is 35V and the lower FET is logic level which is an inherent requirement of the LM3150. So the lower FET has a Vgs of 1V to 3V. We fitted FAN3100T drivers running at 12V to both FETs and there was a small reduction in losses. However the faster switching times are aggrevating the cross conduction due to miller capacitance.
From: dagmargoodboat on 17 Mar 2010 10:17 On Mar 16, 7:26 pm, Raveninghorde <raveninghorde(a)invalid> wrote: > On Tue, 23 Feb 2010 17:07:21 -0800, Joerg <inva...(a)invalid.invalid> > wrote: > > > > >Andy wrote: > >> I have also measured the current waveform in the drain of the upper > >> mosfet. This adds ring to other waveforms, but does show a slope during > >> the on time that is consistent with the inductor being approximately its > >> specified value. It gets warm, not hot. > > >A nice linear slope? That really has me puzzled then. > > >> The 1V appears proportionally as the primary power supply voltage is > >> increased. > > >Hmm, can only be two things. A saturating inductor (but you've excluded > >that already) or maybe not enough gate drive level and Q2 going into a > >wee oscillation your scope can't see. > > >> Unfortunately, the mosfet has been removed and replaced several times, > >> and further mods may make the pcb fail. I am reluctant to remove it to > >> add a resistor. > > >> The pcb is 4-layer, so has almost unbroken ground and power planes, so > >> that supply impedance should not be an issue. There is decoupling with > >> two low ESR 1000µF electrolytics, and several X7R ceramic capacitors on > >> each side of the drive chip. > > >There should also be some ceramics across C16 and C21. > > >> I will try to capture another waveform to show detail of the ringing. > > >That would be good to see. Wish I was there. Then we could fix it and go > >to the pub for a McEwan's Heavy afterwards ;-) > > >> On 23/02/2010 23:12, Joerg wrote: > >>> Raveninghorde wrote: > >>>> On Fri, 19 Feb 2010 14:59:59 -0800, Joerg <inva...(a)invalid.invalid> > >>>> wrote: > > >>>> SNIP > > >>>>> Good. I found that switching times in FET datasheets are often not > >>>>> very dependable. I've had some that I could swing a lot faster. So > >>>>> it's always best to try, maybe your FETs will indeed do the trick. I > >>>>> guess we'll know soon if the UK has parcel service on Saturdays. > > >>>>> [...] > > >>>> We are missing something. We have tried 4 different types of FETs > >>>> wiith no noticable difference. > > >>>> Here are a couple of waveforms. The output stage is now running of the > >>>> bench PSU. Exhibit 1 running of 15V > > >>>>http://www.zen88234.zen.co.uk/photos/TEK0015.jpg > > >>>> Exhibit 2 running off 30V > > >>>>http://www.zen88234.zen.co.uk/photos/TEK0014.jpg > > >>>> The output is 12V 8A. The scope probe is grounded to positive on the > >>>> bottom side of the board on the leg of the drain of the high side FET. > >>>> The probe tip is connected to the source of the high side FET, again > >>>> on the leg under the board. > > >>>> At 15V there is no significant voltage across the FET when switched > >>>> on. On 30V you can see there is about 1V across the FET. This would > >>>> appear to be the cause of the observed dissipation. > > >>>> The voltage drop does not appear to vary with load. It seems to be 1V > >>>> at 100mA as well as 8A. Gate drive level is consistent at about 5.5V > >>>> at all input voltages. The voltage drop across the FET seems to vary > >>>> linearly with input voltage. > > >>>> There is no schottky across the low side FET at the moment. Various > >>>> diodes have been tried up to a 48CTQ060 which should have a max > >>>> forward voltage of 0.4V at 10A. The diode does not affect this problem > >>>> but we will try it again when this is solved. > > >>>> At the moment I hope someone will say DOH, and point out the obvious > >>>> cause of the problem. > > >>> Wish I could but this is strange. On the 30V case plot you can see a > >>> distinct run in from 0V drop to 1V, inside the ringout. It appears to be > >>> a 50nsec slope and then "homes in" at 1V. I can't see anything with that > >>> time constant in your circuit. Unless, of course, the inductor L5 sits > >>> in saturation and the small bit of leakage inductance is responsible. > >>> Could L5 be saturating? > > >>> Would be interesting to see the time base cranked up around this > >>> ringout, and zoomed a bit. But even more important would be to know: > >>> Does this phenomenon suddenly set one when you crank the input voltage > >>> past a certain level or does it gradually rise to 1V while cranking up > >>> from 15V in to 30V in? > > >>> Can you lift the source of Q2, put a few ten milliohms in there and > >>> scope the current? The crank up the bench supply voltage and see if any > >>> sudden pattern change happens there. > > >>> My hunch would be inductor core saturation but hard to say from the > >>> distance. I'd check for that first. > > There seems to have been some scope artifacts in the measurements > which were misleading. > > The problem appears to be cross conduction due to the miller > capacitance of the lower FET switching it on as the upper FET switches > on. > > The supply is 35V and the lower FET is logic level which is an > inherent requirement of the LM3150. So the lower FET has a Vgs of 1V > to 3V. > > We fitted FAN3100T drivers running at 12V to both FETs and there was a > small reduction in losses. However the faster switching times are > aggrevating the cross conduction due to miller capacitance. Time for a little dead-time. An r-c + diode network could do that. -- Cheers, James Arthur
From: Raveninghorde on 17 Mar 2010 11:54
On Wed, 17 Mar 2010 07:17:33 -0700 (PDT), dagmargoodboat(a)yahoo.com wrote: >On Mar 16, 7:26�pm, Raveninghorde <raveninghorde(a)invalid> wrote: >> On Tue, 23 Feb 2010 17:07:21 -0800, Joerg <inva...(a)invalid.invalid> >> wrote: >> >> >> >> >Andy wrote: >> >> I have also measured the current waveform in the drain of the upper >> >> mosfet. This adds ring to other waveforms, but does show a slope during >> >> the on time that is consistent with the inductor being approximately its >> >> specified value. It gets warm, not hot. >> >> >A nice linear slope? That really has me puzzled then. >> >> >> The 1V appears proportionally as the primary power supply voltage is >> >> increased. >> >> >Hmm, can only be two things. A saturating inductor (but you've excluded >> >that already) or maybe not enough gate drive level and Q2 going into a >> >wee oscillation your scope can't see. >> >> >> Unfortunately, the mosfet has been removed and replaced several times, >> >> and further mods may make the pcb fail. I am reluctant to remove it to >> >> add a resistor. >> >> >> The pcb is 4-layer, so has almost unbroken ground and power planes, so >> >> that supply impedance should not be an issue. There is decoupling with >> >> two low ESR 1000�F electrolytics, and several X7R ceramic capacitors on >> >> each side of the drive chip. >> >> >There should also be some ceramics across C16 and C21. >> >> >> I will try to capture another waveform to show detail of the ringing. >> >> >That would be good to see. Wish I was there. Then we could fix it and go >> >to the pub for a McEwan's Heavy afterwards ;-) >> >> >> On 23/02/2010 23:12, Joerg wrote: >> >>> Raveninghorde wrote: >> >>>> On Fri, 19 Feb 2010 14:59:59 -0800, Joerg <inva...(a)invalid.invalid> >> >>>> wrote: >> >> >>>> SNIP >> >> >>>>> Good. I found that switching times in FET datasheets are often not >> >>>>> very dependable. I've had some that I could swing a lot faster. So >> >>>>> it's always best to try, maybe your FETs will indeed do the trick. I >> >>>>> guess we'll know soon if the UK has parcel service on Saturdays. >> >> >>>>> [...] >> >> >>>> We are missing something. We have tried 4 different types of FETs >> >>>> wiith no noticable difference. >> >> >>>> Here are a couple of waveforms. The output stage is now running of the >> >>>> bench PSU. Exhibit 1 running of 15V >> >> >>>>http://www.zen88234.zen.co.uk/photos/TEK0015.jpg >> >> >>>> Exhibit 2 running off 30V >> >> >>>>http://www.zen88234.zen.co.uk/photos/TEK0014.jpg >> >> >>>> The output is 12V 8A. The scope probe is grounded to positive on the >> >>>> bottom side of the board on the leg of the drain of the high side FET. >> >>>> The probe tip is connected to the source of the high side FET, again >> >>>> on the leg under the board. >> >> >>>> At 15V there is no significant voltage across the FET when switched >> >>>> on. On 30V you can see there is about 1V across the FET. This would >> >>>> appear to be the cause of the observed dissipation. >> >> >>>> The voltage drop does not appear to vary with load. It seems to be 1V >> >>>> at 100mA as well as 8A. Gate drive level is consistent at about 5.5V >> >>>> at all input voltages. The voltage drop across the FET seems to vary >> >>>> linearly with input voltage. >> >> >>>> There is no schottky across the low side FET at the moment. Various >> >>>> diodes have been tried up to a 48CTQ060 which should have a max >> >>>> forward voltage of 0.4V at 10A. The diode does not affect this problem >> >>>> but we will try it again when this is solved. >> >> >>>> At the moment I hope someone will say DOH, and point out the obvious >> >>>> cause of the problem. >> >> >>> Wish I could but this is strange. On the 30V case plot you can see a >> >>> distinct run in from 0V drop to 1V, inside the ringout. It appears to be >> >>> a 50nsec slope and then "homes in" at 1V. I can't see anything with that >> >>> time constant in your circuit. Unless, of course, the inductor L5 sits >> >>> in saturation and the small bit of leakage inductance is responsible. >> >>> Could L5 be saturating? >> >> >>> Would be interesting to see the time base cranked up around this >> >>> ringout, and zoomed a bit. But even more important would be to know: >> >>> Does this phenomenon suddenly set one when you crank the input voltage >> >>> past a certain level or does it gradually rise to 1V while cranking up >> >>> from 15V in to 30V in? >> >> >>> Can you lift the source of Q2, put a few ten milliohms in there and >> >>> scope the current? The crank up the bench supply voltage and see if any >> >>> sudden pattern change happens there. >> >> >>> My hunch would be inductor core saturation but hard to say from the >> >>> distance. I'd check for that first. >> >> There seems to have been some scope artifacts in the measurements >> which were misleading. >> >> The problem appears to be cross conduction due to the miller >> capacitance of the lower FET switching it on as the upper FET switches >> on. >> >> The supply is 35V and the lower FET is logic level which is an >> inherent requirement of the LM3150. �So the lower FET has a Vgs of 1V >> to 3V. >> >> We fitted FAN3100T drivers running at 12V to both FETs and there was a >> small reduction in losses. However the faster switching times are >> aggrevating the cross conduction due to miller capacitance. > >Time for a little dead-time. An r-c + diode network could do that. There is about 100ns dead time and the gate of the bottom FET is 0V. When the top FET turns on the gate of the bottom FET rises to about 5V for about 15ns and then drops back to 0V. We added an extra pnp pull down with schottky diode from base to emitter between the driver and FET. The 5V signal comes from the FET not the driver. Also the faster the gate rise time on the top FET the bigger the signal on the lower FET gate. Google found a few article sto explain the issue, such as: http://powerelectronics.com/mag/507PET22.pdf So I don't believe the dead time is the issue. |