First Cortex-M3 MCUs available
in [Embedded]
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From: Laurent on 3 Apr 2006 04:02 Jim Granville wrote: > > One example, of the half dozen deviations/deltas mentioned : > "Memory Protection Unit (MPU) > The LM3S101 controller does not include the memory protection unit (MPU) > of the ARM Cortex-M3." It is not a "deviation" or "delta" it is just that ARMv7-M does not mandate an MPU, it is optional. See Section B2.6 of ARMv7-M Architecture Application Level Reference Manual. > However, if Luminary can pick what to remove and change > ( see their section 2.2 ), presumably other Cortex-M3 licencees will > be doing the same ? Cortex M3 makes the MPU optional. See Section 1.2.8 of Cortex M3 Technical Reference Manual. Laurent
From: 42Bastian Schick on 3 Apr 2006 11:13 On Sun, 02 Apr 2006 15:38:11 GMT, "Wilco Dijkstra" <Wilco_dot_Dijkstra(a)ntlworld.com> wrote: >Cortex-M3 allows all code (startup, interrupt etc) to be written in C - on I really doubt this. At least it is not portable even between ARM compilers. How would you setup a new stackpointer in plain ANSI C ?? A lot of code I have seen relies on the cstartup, which relies on a CS and memory beeing setup already. Now what if the memory-setup relies on the C startup code ? And: How would you save to context of one task/thread/process in (portable) C ? -- 42Bastian Do not email to bastian42(a)yahoo.com, it's a spam-only account :-) Use <same-name>@monlynx.de instead !
From: Peter Dickerson on 3 Apr 2006 11:14 "42Bastian Schick" <bastian42(a)yahoo.com> wrote in message news:4431360e.301479124(a)news.individual.de... > On Sun, 02 Apr 2006 15:38:11 GMT, "Wilco Dijkstra" > <Wilco_dot_Dijkstra(a)ntlworld.com> wrote: > > >Cortex-M3 allows all code (startup, interrupt etc) to be written in C - on > > I really doubt this. At least it is not portable even between ARM > compilers. > How would you setup a new stackpointer in plain ANSI C ?? M3 load stack-pointer and PC at reset. So basically it is a linker facility. A bit of pass-the-buck. the C code still has to init RAM data. > A lot of code I have seen relies on the cstartup, which relies > on a CS and memory beeing setup already. > Now what if the memory-setup relies on the C startup code ? > > And: How would you save to context of one task/thread/process in > (portable) C ? I don't think 'portable' was mentioned. However, M3 interrupts entry and exit is compatible with C ABI. Peter
From: Paul Curtis on 3 Apr 2006 11:14 "Eric" <englere.geo(a)yahoo.com> wrote in message news:1144039132.359850.19860(a)v46g2000cwv.googlegroups.com... > >it's ?99 for the board, a tethered CrossWorks for ARM license, and the > >integrated CrossConnect, so you don't need anything else to evaluate the > >LM3S102. > Wow, that's great! I love Embedded Artists, and I've wanted CrossWorks > for a long time but I couldn't get my company to spring for it. This > price point for your new dev board is so attractive that I can just buy > it for myself. The idea of the CrossFire boards is that they are cheap to evaluate target silicon and CrossWorks as a package. We've had lots of people purchase CrossConnects just to evaluate how well CrossWorks performs on real hardware. Not only that, we've had lots of requests from the hobby lobby to produce a version of CrossWorks under a hobbyist license and we think that this product is a good idea for hobbyists, educationalists, CrossWorks evaluators and silicon evaluators. We expect to introduce more CrossFire boards for silicon we think is interesting and has merit. The Embedded CrossConnect on the CrossFire LM3S102 board is an LPC2142. :-) > By the way, how does the MIPS/milliwat compare with the MSP430? I know > they'll probably use more current than the MSP, but maybe they're > similar if you throttle the speed down? I hope these LM3S102 chips use > a small amount of current so they can be battery powered. Dunno, that didn't really concern me when I put the board into production. Embedded Artists designed the board, and we're very happy with the quality and whole experience working with them. They are also manufacturing the board and taking care of all the details so this is also great for us, we just concentrate on software. They get a nice plug on the reverse of the board too... -- Paul.
From: Wilco Dijkstra on 3 Apr 2006 15:58
"Peter Dickerson" <first{dot}surname(a)ukonline.co.uk> wrote in message news:%YaYf.51544$zr.45052(a)newsfe7-gui.ntli.net... > "42Bastian Schick" <bastian42(a)yahoo.com> wrote in message > news:4431360e.301479124(a)news.individual.de... >> On Sun, 02 Apr 2006 15:38:11 GMT, "Wilco Dijkstra" >> <Wilco_dot_Dijkstra(a)ntlworld.com> wrote: >> >> >Cortex-M3 allows all code (startup, interrupt etc) to be written in C - > on >> >> I really doubt this. At least it is not portable even between ARM >> compilers. We're talking 100% standard C here, no extensions required... However if you'd use intrinsics it would be easy to port between different ARM compilers and even different architectures - that is one of the key benefits of intrinsics (compared to say inline assembler). >> How would you setup a new stackpointer in plain ANSI C ?? > > > M3 load stack-pointer and PC at reset. So basically it is a linker > facility. > A bit of pass-the-buck. the C code still has to init RAM data. Indeed. As long as the init code is careful to avoid using (zero) initialised data before it has intialised it, it can do everything necessary to intialise the chip. >> A lot of code I have seen relies on the cstartup, which relies >> on a CS and memory beeing setup already. >> Now what if the memory-setup relies on the C startup code ? >> >> And: How would you save to context of one task/thread/process in >> (portable) C ? > > I don't think 'portable' was mentioned. However, M3 interrupts entry and > exit is compatible with C ABI. For a full process switch I'd use a few lines of assembler. People have suggested using setjmp or intrinsics, but I think that is a step too far. However for a really simple "RTOS" you don't need a full task switch. If tasks are primarily interrupt driven then interrupts simply preempt lower priority tasks and all task switching is done by the hardware. You can change priorities of interrupts on the fly as well. Wilco |