From: Terje Mathisen "terje.mathisen at on
Robert Myers wrote:
> Maybe you want more programmable control over coherence domains. If
> you're not going to scrap cache and cache snooping, maybe you can
> wrestle some control away from the hardware and give it to the
> software.

That sounds like software-controlled distributed shared memory, a
concept that generates a lot more research papers and PhDs than actual
useful products, at least so far. :-(

Terje

--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"
From: Robert Myers on
On Jul 25, 4:42 am, Terje Mathisen <"terje.mathisen at tmsw.no">
wrote:
> Robert Myers wrote:
> > Maybe you want more programmable control over coherence domains.  If
> > you're not going to scrap cache and cache snooping, maybe you can
> > wrestle some control away from the hardware and give it to the
> > software.
>
> That sounds like software-controlled distributed shared memory, a
> concept that generates a lot more research papers and PhDs than actual
> useful products, at least so far. :-(
>

A PhD thesis that we both saw presented

www.bunniestudios.com/bunnie/phdthesis.pdf

dealt with a similar train of thought, except taking the exact
opposite turn: doing even more to hide the hardware from the user of
distributed memory. I understand much better now what he was trying
to do. ;-)

Robert.

From: Terje Mathisen "terje.mathisen at on
Robert Myers wrote:
> On Jul 25, 4:42 am, Terje Mathisen<"terje.mathisen at tmsw.no">
> wrote:
>> Robert Myers wrote:
>>> Maybe you want more programmable control over coherence domains. If
>>> you're not going to scrap cache and cache snooping, maybe you can
>>> wrestle some control away from the hardware and give it to the
>>> software.
>>
>> That sounds like software-controlled distributed shared memory, a
>> concept that generates a lot more research papers and PhDs than actual
>> useful products, at least so far. :-(
>>
>
> A PhD thesis that we both saw presented
>
> www.bunniestudios.com/bunnie/phdthesis.pdf

Hmmm... Andrew "Bunnie" Huang I presume?

Yes!

I remember seeing that thesis, but I was chocked just now when I
realized that it was from way back in 2002!
>
> dealt with a similar train of thought, except taking the exact
> opposite turn: doing even more to hide the hardware from the user of
> distributed memory. I understand much better now what he was trying
> to do. ;-)

Trying to define an architecture which could bypass as many of the
(data) transport-related problems as possible, by making it extremely
cheap to migrate sw threads instead?

Terje
>
> Robert.
>


--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"
From: Robert Myers on
On Jul 25, 2:23 pm, Terje Mathisen <"terje.mathisen at tmsw.no">
wrote:
> Robert Myers wrote:
> > On Jul 25, 4:42 am, Terje Mathisen<"terje.mathisen at tmsw.no">
> > wrote:
> >> Robert Myers wrote:
> >>> Maybe you want more programmable control over coherence domains.  If
> >>> you're not going to scrap cache and cache snooping, maybe you can
> >>> wrestle some control away from the hardware and give it to the
> >>> software.
>
> >> That sounds like software-controlled distributed shared memory, a
> >> concept that generates a lot more research papers and PhDs than actual
> >> useful products, at least so far. :-(
>
> > A PhD thesis that we both saw presented
>
> >www.bunniestudios.com/bunnie/phdthesis.pdf
>
> Hmmm... Andrew "Bunnie" Huang I presume?
>
> Yes!
>
> I remember seeing that thesis, but I was chocked just now when I
> realized that it was from way back in 2002!
>
>
>
> > dealt with a similar train of thought, except taking the exact
> > opposite turn: doing even more to hide the hardware from the user of
> > distributed memory.  I understand much better now what he was trying
> > to do. ;-)
>
> Trying to define an architecture which could bypass as many of the
> (data) transport-related problems as possible, by making it extremely
> cheap to migrate sw threads instead?
>
Move the instructions to the data, I gather, rather than the other way
around.

That wouldn't help my problems.

Robert.
From: Andrew Reilly on
On Sat, 24 Jul 2010 16:52:22 -0700, MitchAlsup wrote:

> I think what Robert is getting at is that lumping everything under a
> coherent cache is running into a vonNeumann wall.

Coherence is clearly complicated, but it doesn't seem necessarily to be
sequential. Are there theoretical limits to how parallelisable coherence
can be? Is the main issue speed-of-light limits to round-trip
communication between distributed cache controllers?

Cheers,

--
Andrew