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From: rickman on 3 Feb 2010 21:29
I know Antti has a lot of experience with Actel, so I expect to hear
from him, but I am sure there are others out there with experience of
Actel tools. A customer of mine has told me that he used Actel for a
project some 4 or 5 years ago and had a problem with the tools that
Actel could not give a fix for. I don't recall how he worked around
it and I am sure that particular issue has been fixed, but I now have
the impression that the Actel tools are not as good as tools from the
other three. I seem to recall some significant issues being discussed
here.

Can anyone confirm or dispute it the relative quality of Actel tools?
Am I mistaken about them?

Rick
From: Thomas Stanka on 5 Feb 2010 04:53
On 4 Feb., 12:01, whygee <y...(a)yg.yg> wrote:
> > Can anyone confirm or dispute it the relative quality of Actel tools?
> > Am I mistaken about them?
>
> The Actel tools take a while to get used too,
> like most big SW suites. It's its own world...
> It is not particularly terrible, I can do
> mostly what I want, inside the bounds of reality
> and the target chip's capacity.

For "normal" projects I have the same opinion.

I'm using Actel since nearly 10 years now in a lot of projects for
several technologies.

Actel provides a crippled version of Modelsim like most other tools
(Xilinx,...) I can't say anything about this, as I have access to full
Modelsim.
The synthesis tool provided for free is Synplicity. I would consider
this tool as usable in standard projects and would be surprised if xst
performs better in overall. But Synplify itself as well as in
combination with the libraries of Actel for several technologies may
cause trouble if you need to squeeze the technologie or leave the
"main stream" of hdl coding. Synplicity provides no direct support and
Actel can't provide the needed support in some cases. I remember
several problems which could not be fixed in a reasonable amount of
time by Actel.

The major used tool from Actel is desiger (the P&R+Layout tool). This
tool is quite good if you're used to it and it took me less time to
get the first design done than my experiences with xilinx.
But the manual layout itself is in each technology different (which I
would consider major drawback). I personaly dislike the manual layout
or pinassignment per GUI of ProAsic devices, while the story is
complete different for SX-S.

You may encounter problems when doing large designs on new released
technologies. The windows version is atm only usable in 32-bit OS
which will bite you when doing very large designs.

bye Thomas


From: rickman on 5 Feb 2010 09:44
On Feb 5, 4:53 am, Thomas Stanka <usenet_nospam_va...(a)stanka-web.de>
wrote:
> On 4 Feb., 12:01, whygee <y...(a)yg.yg> wrote:
>
> > > Can anyone confirm or dispute it the relative quality of Actel tools?
> > > Am I mistaken about them?
>
> > The Actel tools take a while to get used too,
> > like most big SW suites. It's its own world...
> > It is not particularly terrible, I can do
> > mostly what I want, inside the bounds of reality
> > and the target chip's capacity.
>
> For "normal" projects I have the same opinion.
>
> I'm using Actel since nearly 10 years now in a lot of projects for
> several technologies.
>
> Actel provides a crippled version of Modelsim like most other tools
> (Xilinx,...) I can't say anything about this, as I have access to full
> Modelsim.
> The synthesis tool provided for free is Synplicity. I would consider
> this tool as usable in standard projects and would be surprised if xst
> performs better in overall. But Synplify itself as well as in
> combination with the libraries of Actel for several technologies may
> cause trouble if you need to squeeze the technologie or leave the
> "main stream" of hdl coding. Synplicity provides no direct support and
> Actel can't provide the needed support in some cases. I remember
> several problems which could not be fixed in a reasonable amount of
> time by Actel.
>
> The major used tool from Actel is desiger (the P&R+Layout tool). This
> tool is quite good if you're used to it and it took me less time to
> get the first design done than my experiences with xilinx.
> But the manual layout itself is in each technology different (which I
> would consider major drawback). I personaly dislike the manual layout
> or pinassignment per GUI of ProAsic devices, while the story is
> complete different for SX-S.
>
> You may encounter problems when doing large designs on new released
> technologies. The windows version is atm only usable in 32-bit OS
> which will bite you when doing very large designs.
>
> bye Thomas

"atm only"? Is that a typo? It seems to read ok if the "atm" is left
out entirely.

Rick
From: Jonathan Bromley on 5 Feb 2010 09:54
On Fri, 5 Feb 2010 06:44:18 -0800 (PST), rickman wrote:

>"atm only"? Is that a typo? It seems to read ok if the "atm" is left
>out entirely.

atm ~= "at the moment" ?
--
Jonathan Bromley
From: rickman on 5 Feb 2010 13:00
On Feb 5, 9:54 am, Jonathan Bromley <jonathan.brom...(a)MYCOMPANY.com>
wrote:
> On Fri, 5 Feb 2010 06:44:18 -0800 (PST), rickman wrote:
> >"atm only"?  Is that a typo?  It seems to read ok if the "atm" is left
> >out entirely.
>
> atm ~= "at the moment" ?
> --
> Jonathan Bromley

PUTMNOAAA*

Rick



*People Use Too Many Non Obvious Abbreviations And Acronyms
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