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From: AgentFriday on 23 Mar 2010 06:00
Groepaz wrote:
>
>> There's another possibility. When working on this I
>> discovered that there appears to be a flaw in some 6526 CIA
>> chips. On an unpredictable basis, the chip generates an
>> interrupt, but doesn't set the appropriate flag. I found a
>> way to quickly test for this, and then everything worked ok.
>
>can you elaborate on that? i've written quite some CIA related code, but
>never had a problem with this.

George's Transactor article gives details. (Direct link to article):
http://cbm.csbruce.com/~csbruce/cbm/transactor/v9/i3/p062.html

[ Thanks to "csbruce" who makes these available on his site (with
permission, even) ]


To avoid confusion, note that the interrupt mentioned IS appropriate,
but the the flag may not get set as it should.


Excerpt below, for snippage. (I did not transcribe the part where the
correction is explained.)
From: Jim Brain on 23 Mar 2010 12:27
On 3/23/2010 4:25 AM, AgentFriday wrote:
> Jim Brain wrote ...
> We eventually connected 2 Commodores together at
> 5V levels and still got frequent errors even at the
> lowest supported rate (_50_Baud_). The patterns
> and frequency of errors were indistinguishable from
> what we encountered when connected to RS-232 devices.
That does seem odd. Many people used the stock routines in the day, and
I never heard of issues at 50bps.
> We made 2 separate circuits, one using a MAX-232e
> and another with a MAX-3235e (same as 232 but with
> all charge pump caps built in.
That's a common design.
> Yup. Them are the very ones we are relying on. My
> friend spent _days_ of research trying to find good
> replacement routines and finally stumbled on the
> article "Toward 2400 Baud" by George Hug in Vol 9,
> Issue 3 of Transactor magazine. (Someone should
> index or OCR that title. Great stuff in there.)
Feel free to ask in here next time. There's no guarantee of success,
but I've known about the Hug routines for years, and I think I even have
the Fuzzy Fox mods to them (adds even/odd parity, etc.) Others in here
know of them as well.

Jim
From: Jim Brain on 23 Mar 2010 12:28
On 3/22/2010 9:55 PM, George wrote:
> Jim Brain says...
> There's another possibility. When working on this I
> discovered that there appears to be a flaw in some 6526 CIA
> chips. On an unpredictable basis, the chip generates an
> interrupt, but doesn't set the appropriate flag. I found a
> way to quickly test for this, and then everything worked ok.
If you do remember anything about this at some point, or have notes,
we're all ears.
> Yes. As I remember, I generated a square wave, which is
> continuous transmission of #$55 in 8N1, then found the range
> of receiver timings that would receive that transmission
> stream error-free, then just used the center point of that
> range for the final routines. I think it's all in the
> Transactor article.
You did. Nice to see you in here, George.
> But for all the shortcomings of the kernal routines in the C64,
> it's worse in the Plus4. Even though the +4 has a real 6551 ACIA
> chip, it will not properly receive a null byte because two
> instructions are out of order. Apparentlly RS232 on the +4 was
> never tested by CBM.
Does not surprise me.

From: George on 23 Mar 2010 22:51
AgentFriday says...

>> can you elaborate on that? i've written quite some CIA
>> related code, but never had a problem with this.

> George's Transactor article gives details. (Direct link
> to article):
> http://cbm.csbruce.com/~csbruce/cbm/transactor/v9/i3/p062.html

> [ Thanks to "csbruce" who makes these available on his
> site (with permission, even) ]

Yes, the problem is described in item 4 on page 63 of the
article. Basically, the problem occurs when Timer B
underflows at about the same time as the interrupt register
is read. So if something else, like Timer A, has actually
generated the interrupt, but Timer B then times out just
before you read the register, the flag for Timer B isn't
set.

The solution is to read the high byte of Timer B just
before you read the interrupt register, and then again
after, If the value is higher on the second read, then
Timer B must have underflowed.

This would not normally be a problem unless you are
transmitting and receiving at the same time in full duplex.


From: George on 23 Mar 2010 22:57
Jim Brain says...

>> We eventually connected 2 Commodores together at 5V
>> levels and still got frequent errors even at the lowest
>> supported rate (_50_Baud_). The patterns and frequency
>> of errors were indistinguishable from what we
>> encountered when connected to RS-232 devices.

> That does seem odd. Many people used the stock routines
> in the day, and I never heard of issues at 50bps.

I agree. Something else is going on. Maybe not opening the
port correctly. Or something. An awful lot of people have
used RS232 at 300 bps, and even 1200 bps, with good results.

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