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From: Jon Kirwan on 14 Jul 2010 14:53
On Wed, 14 Jul 2010 11:14:56 -0700 (PDT), john1987
<conphiloso(a)hotmail.com> wrote:

>Hi, So it means that I need a microcontroller of master clock
>frequency of 128Mhz with 8 bit of resolution PWM to get 500kHz PWM
>signal.

Or some multiplier technique like a PLL to get the master
clock rate up to a higher PWM clock rate, such as the
ATtiny26 uses.

Jon
From: linnix on 14 Jul 2010 14:53
On Jul 14, 11:14 am, john1987 <conphil...(a)hotmail.com> wrote:
> Hi, So it means that I need a microcontroller of master clock
> frequency of 128Mhz with 8 bit of resolution PWM to get 500kHz PWM
> signal.
>
> Thanks
> John

CPLD/FPGA would be cheaper than micro at medium speed (~200MHz to
400MHz).
From: hamilton on 14 Jul 2010 14:59
On 7/14/2010 12:14 PM, john1987 wrote:
> Hi, So it means that I need a microcontroller of master clock
> frequency of 128Mhz with 8 bit of resolution PWM to get 500kHz PWM
> signal.
>
> Thanks
> John
>
Hi John,

You seem to be under the impression that you will be doing this in software.

Previous postings have stated that hardware PWM is the only way to go.

A 300Khz to 500Khz PWM is not PWM, its a range of frequencies.

If you want a 500Khz PWM, it would be 500Khz from two raising edges with
a variable high to low time.

500Khz is 2 microseconds between edges.
__________ __________
| | |
--| |__________|
^ ^
| 2 uSec |

This is also 50% duty cycle PWM.

_ _
| | | |
__| |___________________| |__________
^ ^ ^
| | 1.8uSec |
.2uSec
.2uSec + 1.8uSec= 2 uSec or 500Khz PWM with a 10% duty cycle

or
___________________ ____________
| | |
__| |_|
^ ^ ^
| 1.8 uSec | |
.2uSec
1.8 Usec + .2 uSec = 2 uSec is still 500Khz with a 90% duty cycle

Your original post asked for 10bit resolution, thats 1024 steps, so each
step would be 2usec/1024 ~ 1.95nanoseconds per step !!

Is this what you really want ??

This is not going to be done is software.

hamilton
From: john1987 on 14 Jul 2010 15:33
Hi,

The hardware is available on the microcontroller chip. The dedicated
PWM generator. Am I right? or did you mean that I have to design it
byself. For example the C8051F411 has a on board 8 bit PWM generator
that can can go up to 93 KHz of different duty cycles. Am I on the
right track?

John
From: Tim Williams on 14 Jul 2010 15:58
"Jim Thompson" <To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote in message news:s0ur3692br76630tfq7t1ueehnbi5bgp5t(a)4ax.com...
> I have in mind an application where I wouldn't care about high
> frequency content (really low frequencies).
>
> Can you point me to some papers on how to accomplish that?

Look up fractional convergents and continued fractions.

I wrote a program which accepts a rational number and converts it to whatever convergent you prefer. By ending the process at a certain limit, for instance a divisor less than 256, you get a best case resolution much better than crude 8 bit PWM. Worse-case isn't any worse, since you can't count less than 1/256 in either case. With proper selection of convergents, you can keep frequency similar as well (e.g., only pick convergents in the 224-255 range).

It's too bad I'm in your killfile, it seems the futility of your arrogance has been proven ;-)

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
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