From: Joerg on 20 Jun 2010 20:07 Spehro Pefhany wrote: > On Sun, 20 Jun 2010 15:28:53 -0700, the renowned John Larkin > <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >> On Sun, 20 Jun 2010 22:01:24 GMT, paulhendersen(a)qualcomm.com (Paul >> Henderson) wrote: >> >>> On Sun, 20 Jun 2010 07:38:00 -0700, John Larkin >>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>> On a current design, I had to make my own. I wanted lots of >>>> overvoltage protection, logic-switchable gains from 0.05 to 256, high >>>> precision, and at least +-12 volts of common-mode range, 120 dB CMRR >>>> at high gain. I wound up with a classic 3-opamp diffamp, using an >>>> LT1124 dual opamp, four Supertex depletion mode fets for protection, a >>>> discrete string of thinfilm resistors, one DPDT gain switch relay, two >>>> analog muxes, and an INA154 as the second stage. Two tiny trimpots >>>> tweak cmrr. Times 16 on one board. I'd love to get all that in a SO-8! >>>> >>> If that's not a proprietary design John, any chance of posting a link >>> to the schematic? >>> >>> Paul Hendersen >> >> Yes, it is proprietary but, hell, I *am* the boss, so here it is: >> >> ftp://jjlarkin.lmi.net/22S490B_ch12.pdf >> >> in hopes that it will invoke an entertaining flurry of pecking and >> clucking. >> >> I don't totally like the style of the schematic; I drew it on D-size >> vellum "my way" and The Brat entered it into PADS. It would be too >> much work to push 16 channels of stuff around at this point. >> >> John >> > > That bipolar relay driver is a thing of beauty. > Sure is. But John calls them "K", as in kontactor or kool kampground :-)) -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: John Larkin on 20 Jun 2010 20:10 On Sun, 20 Jun 2010 18:42:11 -0500, "krw(a)att.bizzzzzzzzzzzz" <krw(a)att.bizzzzzzzzzzzz> wrote: >On Sun, 20 Jun 2010 16:33:04 -0700, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Sun, 20 Jun 2010 18:18:20 -0500, "krw(a)att.bizzzzzzzzzzzz" >><krw(a)att.bizzzzzzzzzzzz> wrote: >> >>>On Sun, 20 Jun 2010 15:28:53 -0700, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Sun, 20 Jun 2010 22:01:24 GMT, paulhendersen(a)qualcomm.com (Paul >>>>Henderson) wrote: >>>> >>>>>On Sun, 20 Jun 2010 07:38:00 -0700, John Larkin >>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>>On a current design, I had to make my own. I wanted lots of >>>>>>overvoltage protection, logic-switchable gains from 0.05 to 256, high >>>>>>precision, and at least +-12 volts of common-mode range, 120 dB CMRR >>>>>>at high gain. I wound up with a classic 3-opamp diffamp, using an >>>>>>LT1124 dual opamp, four Supertex depletion mode fets for protection, a >>>>>>discrete string of thinfilm resistors, one DPDT gain switch relay, two >>>>>>analog muxes, and an INA154 as the second stage. Two tiny trimpots >>>>>>tweak cmrr. Times 16 on one board. I'd love to get all that in a SO-8! >>>>>> >>>>> >>>>>If that's not a proprietary design John, any chance of posting a link >>>>>to the schematic? >>>>> >>>>>Paul Hendersen >>>> >>>> >>>>Yes, it is proprietary but, hell, I *am* the boss, so here it is: >>>> >>>>ftp://jjlarkin.lmi.net/22S490B_ch12.pdf >>>> >>>>in hopes that it will invoke an entertaining flurry of pecking and >>>>clucking. >>> >>>Clucking_mode=on. >>> >>>Doesn't your common mode rejection depend on the tracking of the two >>>DACs/resistor strings? >> >>DACs? > >Resistors + switches = multiplying DAC Oh, well, OK. I like to think of them as resistors and switches. I don't think the resistor values matter. Imagine applying, say, +5 volts to both opamp + inputs. Each opamp forces its own - input to be +5, too. So every point along the resistor string must be +5, and the opamp outputs are +5, so there's no difference applied to the INA thing, regardless of the resistor values. >>> >>>I've done something similar, but with R407, if I understand the design >>>correctly, being controlled (ADI 1024-tap digi-pot, in my case), rather than >>>the two feedback resistors. In my case, the common mode rejection depends on >>>the two fixed feedback resistors, which is simpler. Of course the gain is >>>backwards, but that's the DSPs job. ;-) >> >>I looked into using digi-pots as the CMRR trims, but they had poor >>resolution, poor TCs, and/or tons of capacitance. Plus, we were almost >>out of digital interface resources. The trimpots we're using are about >>the size of a 1206 resistor. > >The point is to not need trimming, particularly gain sensitive trim. I don't know how to get 120 dB CMRR without trimming something. Gains and offsets are tweaked digitally in the FPGA, based on cal factors stored in eeprom. Every range of every channel has its own zero and gain cal factors. That requires some ADC headroom, so in theory creates missing codes. In practice, there's several bits of inherent ADC dithering which, digitally filtered, spackles over the holes. John
From: John Larkin on 20 Jun 2010 20:19 On Sun, 20 Jun 2010 19:39:31 -0400, Spehro Pefhany <speffSNIP(a)interlogDOTyou.knowwhat> wrote: >On Sun, 20 Jun 2010 15:28:53 -0700, the renowned John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Sun, 20 Jun 2010 22:01:24 GMT, paulhendersen(a)qualcomm.com (Paul >>Henderson) wrote: >> >>>On Sun, 20 Jun 2010 07:38:00 -0700, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On a current design, I had to make my own. I wanted lots of >>>>overvoltage protection, logic-switchable gains from 0.05 to 256, high >>>>precision, and at least +-12 volts of common-mode range, 120 dB CMRR >>>>at high gain. I wound up with a classic 3-opamp diffamp, using an >>>>LT1124 dual opamp, four Supertex depletion mode fets for protection, a >>>>discrete string of thinfilm resistors, one DPDT gain switch relay, two >>>>analog muxes, and an INA154 as the second stage. Two tiny trimpots >>>>tweak cmrr. Times 16 on one board. I'd love to get all that in a SO-8! >>>> >>> >>>If that's not a proprietary design John, any chance of posting a link >>>to the schematic? >>> >>>Paul Hendersen >> >> >>Yes, it is proprietary but, hell, I *am* the boss, so here it is: >> >>ftp://jjlarkin.lmi.net/22S490B_ch12.pdf >> >>in hopes that it will invoke an entertaining flurry of pecking and >>clucking. >> >>I don't totally like the style of the schematic; I drew it on D-size >>vellum "my way" and The Brat entered it into PADS. It would be too >>much work to push 16 channels of stuff around at this point. >> >>John >> > >That bipolar relay driver is a thing of beauty. > Like that? Rob's idea. We used latching relays to avoid thermals on the 10 mV range. Our launch customer wanted a 10 mV range, which we thought was crazy, but they have money that we want. The eight data lines are 0/3.3v, and the four bank select lines are translated up to 0/5v, so we can park the drivers in a state where they don't run hot. I guess you could matrix address the relays if you put a SOT-23 dual zener in series with each coil. But the drivers would be more complex, not worth it for just 32 relays. John
From: Spehro Pefhany on 20 Jun 2010 20:23 On Sun, 20 Jun 2010 17:07:12 -0700, the renowned Joerg <invalid(a)invalid.invalid> wrote: >Spehro Pefhany wrote: >> On Sun, 20 Jun 2010 15:28:53 -0700, the renowned John Larkin >> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>> On Sun, 20 Jun 2010 22:01:24 GMT, paulhendersen(a)qualcomm.com (Paul >>> Henderson) wrote: >>> >>>> On Sun, 20 Jun 2010 07:38:00 -0700, John Larkin >>>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>> On a current design, I had to make my own. I wanted lots of >>>>> overvoltage protection, logic-switchable gains from 0.05 to 256, high >>>>> precision, and at least +-12 volts of common-mode range, 120 dB CMRR >>>>> at high gain. I wound up with a classic 3-opamp diffamp, using an >>>>> LT1124 dual opamp, four Supertex depletion mode fets for protection, a >>>>> discrete string of thinfilm resistors, one DPDT gain switch relay, two >>>>> analog muxes, and an INA154 as the second stage. Two tiny trimpots >>>>> tweak cmrr. Times 16 on one board. I'd love to get all that in a SO-8! >>>>> >>>> If that's not a proprietary design John, any chance of posting a link >>>> to the schematic? >>>> >>>> Paul Hendersen >>> >>> Yes, it is proprietary but, hell, I *am* the boss, so here it is: >>> >>> ftp://jjlarkin.lmi.net/22S490B_ch12.pdf >>> >>> in hopes that it will invoke an entertaining flurry of pecking and >>> clucking. >>> >>> I don't totally like the style of the schematic; I drew it on D-size >>> vellum "my way" and The Brat entered it into PADS. It would be too >>> much work to push 16 channels of stuff around at this point. >>> >>> John >>> >> >> That bipolar relay driver is a thing of beauty. >> > >Sure is. > >But John calls them "K", as in kontactor or kool kampground :-)) K is the standard designator for relays. Don't know why. Best regards, Spehro Pefhany -- "it's the network..." "The Journey is the reward" speff(a)interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
From: krw on 20 Jun 2010 21:11
On Sun, 20 Jun 2010 17:10:35 -0700, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Sun, 20 Jun 2010 18:42:11 -0500, "krw(a)att.bizzzzzzzzzzzz" ><krw(a)att.bizzzzzzzzzzzz> wrote: > >>On Sun, 20 Jun 2010 16:33:04 -0700, John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Sun, 20 Jun 2010 18:18:20 -0500, "krw(a)att.bizzzzzzzzzzzz" >>><krw(a)att.bizzzzzzzzzzzz> wrote: >>> >>>>On Sun, 20 Jun 2010 15:28:53 -0700, John Larkin >>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>>On Sun, 20 Jun 2010 22:01:24 GMT, paulhendersen(a)qualcomm.com (Paul >>>>>Henderson) wrote: >>>>> >>>>>>On Sun, 20 Jun 2010 07:38:00 -0700, John Larkin >>>>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>>> >>>>>>>On a current design, I had to make my own. I wanted lots of >>>>>>>overvoltage protection, logic-switchable gains from 0.05 to 256, high >>>>>>>precision, and at least +-12 volts of common-mode range, 120 dB CMRR >>>>>>>at high gain. I wound up with a classic 3-opamp diffamp, using an >>>>>>>LT1124 dual opamp, four Supertex depletion mode fets for protection, a >>>>>>>discrete string of thinfilm resistors, one DPDT gain switch relay, two >>>>>>>analog muxes, and an INA154 as the second stage. Two tiny trimpots >>>>>>>tweak cmrr. Times 16 on one board. I'd love to get all that in a SO-8! >>>>>>> >>>>>> >>>>>>If that's not a proprietary design John, any chance of posting a link >>>>>>to the schematic? >>>>>> >>>>>>Paul Hendersen >>>>> >>>>> >>>>>Yes, it is proprietary but, hell, I *am* the boss, so here it is: >>>>> >>>>>ftp://jjlarkin.lmi.net/22S490B_ch12.pdf >>>>> >>>>>in hopes that it will invoke an entertaining flurry of pecking and >>>>>clucking. >>>> >>>>Clucking_mode=on. >>>> >>>>Doesn't your common mode rejection depend on the tracking of the two >>>>DACs/resistor strings? >>> >>>DACs? >> >>Resistors + switches = multiplying DAC > >Oh, well, OK. I like to think of them as resistors and switches. I like to think of things as they are, not what they're made out of. You have an instrumentation amp, not three funky opamps. ;-) >I don't think the resistor values matter. Imagine applying, say, +5 >volts to both opamp + inputs. Each opamp forces its own - input to be >+5, too. So every point along the resistor string must be +5, and the >opamp outputs are +5, so there's no difference applied to the INA >thing, regardless of the resistor values. Yeah, I was originally looking at the diagram a little differently. In light of this, one of your DACs is superfluous. >>>> >>>>I've done something similar, but with R407, if I understand the design >>>>correctly, being controlled (ADI 1024-tap digi-pot, in my case), rather than >>>>the two feedback resistors. In my case, the common mode rejection depends on >>>>the two fixed feedback resistors, which is simpler. Of course the gain is >>>>backwards, but that's the DSPs job. ;-) >>> >>>I looked into using digi-pots as the CMRR trims, but they had poor >>>resolution, poor TCs, and/or tons of capacitance. Plus, we were almost >>>out of digital interface resources. The trimpots we're using are about >>>the size of a 1206 resistor. >> >>The point is to not need trimming, particularly gain sensitive trim. > >I don't know how to get 120 dB CMRR without trimming something. I was expecting that you wouldn't get anywhere close to 60dB without. Looking again, your way of doing it and what we've done isn't all that different, except that you're using twice as many switches (and ours are integrated). >Gains and offsets are tweaked digitally in the FPGA, based on cal >factors stored in eeprom. Every range of every channel has its own >zero and gain cal factors. That requires some ADC headroom, so in >theory creates missing codes. In practice, there's several bits of >inherent ADC dithering which, digitally filtered, spackles over the >holes. Yeah, I see your switches to do the zero correction. In ours we don't care about any of that, just need the dynamic range. Audio is easy. |