From: Jon Slaughter on
Is it possible to drive the gate of a high side n-ch mosfet using an
optocoupler to isolate and float the gate w.r.t to the source and still be
effective?

I want to continuously control the gate of a high side n-ch mosfet to prove
a variable resistance for a high voltage load.


G = Gate, S = Source, D = Drain
OE = Opto Emitter, OC = Opto Collector

Vcc--D


OC--R2--D
OE--G

G--R1--S
|
Load
|
Gnd


The idea is simple, a resistor(R1) connects the gate to the source. When no
current is flowing the gate is then held at the same voltage as the source
and the mosfet is turned off.

An optocoupler is added to control current through that gate/source resistor
which will "bias" the gate relative to the source and allow turning on the
mosfet. A simple simulation shows this works but I'm not use how useful it
is. Some protection mechanism for the opto would be needed as well as
driving the gate too high.

The isolation is necessary because of the high voltage used. I'm not worried
about the "speed" as this isn't used for switching.



From: John Larkin on
On Tue, 22 Dec 2009 10:18:04 -0600, "Jon Slaughter"
<Jon_Slaughter(a)Hotmail.com> wrote:

>Is it possible to drive the gate of a high side n-ch mosfet using an
>optocoupler to isolate and float the gate w.r.t to the source and still be
>effective?
>
>I want to continuously control the gate of a high side n-ch mosfet to prove
>a variable resistance for a high voltage load.
>
>
>G = Gate, S = Source, D = Drain
>OE = Opto Emitter, OC = Opto Collector
>
>Vcc--D
>
>
>OC--R2--D
>OE--G
>
>G--R1--S
> |
> Load
> |
> Gnd
>
>
>The idea is simple, a resistor(R1) connects the gate to the source. When no
>current is flowing the gate is then held at the same voltage as the source
>and the mosfet is turned off.
>
>An optocoupler is added to control current through that gate/source resistor
>which will "bias" the gate relative to the source and allow turning on the
>mosfet. A simple simulation shows this works but I'm not use how useful it
>is. Some protection mechanism for the opto would be needed as well as
>driving the gate too high.
>
>The isolation is necessary because of the high voltage used. I'm not worried
>about the "speed" as this isn't used for switching.
>
>

If I understand your circuit, it puts a lot of voltage across the opto
output. A shunt circuit wouldn't. But then there *are* optos with 400
volt phototransistors. [1]

A photovoltaic coupler would be nice, as it can drive the gate
directly and doesn't need a high-side supply. They tend to be wimpy,
10s of uA output, so they would be pretty slow. An advantage is that
there's no sneak current path to the load.


Or do this maybe:


V+-------+---------+
| |
| |
Q |
| |
| d
+--------g
| s
c |
b |
e |
| |
| |
+---------+
|
|
|
load

where Q is a Supertex depletion fet current limiter, cbe is the opto
phototransistor, and there should be a zener g-s which I'm too lazy to
draw. It does leak a litle current into the load.

John

[1] and I just saw an ad for a 10,000 volt photodiode.


From: Phil Hobbs on
On 12/22/2009 11:49 AM, John Larkin wrote:
<snip>
> [1] and I just saw an ad for a 10,000 volt photodiode.
>
>

Probably a gassy 1B3. ;)

Cheers

Phil Hobbs
From: Jim Thompson on
On Tue, 22 Dec 2009 12:25:11 -0500, Phil Hobbs
<pcdhSpamMeSenseless(a)electrooptical.net> wrote:

>On 12/22/2009 11:49 AM, John Larkin wrote:
><snip>
>> [1] and I just saw an ad for a 10,000 volt photodiode.
>>
>>
>
>Probably a gassy 1B3. ;)
>
>Cheers
>
>Phil Hobbs

Sno-o-o-ort ;-)

...Jim Thompson
--
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From: John Larkin on
On Wed, 23 Dec 2009 01:59:30 -0600, "Tim Williams"
<tmoranwms(a)charter.net> wrote:

>"John Larkin" <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in message
>news:gfq2j5dnr8opsgh9mitk2ld7op1502gavs(a)4ax.com...
>> http://www.voltagemultipliers.com/pdf/Opto-Diode%2001_12_09.pdf
>>
>> http://www.voltagemultipliers.com/pdf/OC100HG_11_05_09.pdf
>>
>> It looks like a surface-conduction silicon tube thing maybe, which can
>> be a little leaky. This looks like fun for, well, *something*
>
>Not quite, it says it's a diode... Vf = 12V or so.
>
>How do they make those, anyway? Are they monolithic? Even with a
>wide-assed intrinsic region (PIN structure), I don't know of 10kV being held
>off by a single junction. Besides, such a junction would have to be so
>thick that diffusion effects within would not be negligible.
>
>I can still imagine them being made monolithically, but laterally, so you
>basically make a stack of PN's, shorting every other so it makes an
>always-on SCR.
>
>Tim

These people make diode stacks, so maybe that's what it is, a bunch of
diodes bonded together, maybe soldered. But it is awfully leaky, so
probably they are exposing the edges of the junctions. I'll try to get
a sample and see.

These guys are really expensive. They make a nice small C-W stack that
I wanted to use, but they wanted like $60 or something for it. I did
it with parts for a few dollars.

John

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