From: MooseFET on
On May 19, 5:46 pm, "Tim Williams" <tmoran...(a)charter.net> wrote:
> "Bitrex" <bit...(a)de.lete.earthlink.net> wrote in message
>
> news:E-ydndNy_Iic7GnWnZ2dnUVZ_gednZ2d(a)earthlink.com...
>
> > I'd love to try it out, but I'm an AVR guy - I wonder how difficult it
> > would be to port the code to use on something like an ATMega168....
>
> Considering how awful the PIC is, that could take a while :)

I always use the CDP1802 as the reference for awful instruction sets.

A = B + C

needs 16 instructions in an 1802. Compared to it, the PIC is not too
bad.

The 8051 has a fairly nice instruction set in that it does a lot of
the
things that you want a microcontroller to do with just one or perhaps
2
instructions.


> I don't entirely like the AVR instruction set.  200+ instructions and hardly
> any of them do anything, in and of themselves.  Any basic operation requires
> two or more (load, modify, store).  So as nice as it is, it's tedious to
> use.  Despite the tedium, it's definitely easy to use.

The AVR does have an OK instruction set but it isn't really correct to
call it
a RISC. It has a largish instruction set.

From: Jan Panteltje on
On a sunny day (Thu, 20 May 2010 06:11:31 -0700 (PDT)) it happened MooseFET
<kensmith(a)rahul.net> wrote in
<ca4e547b-dded-4a76-bce3-d6c443a6ef0d(a)u20g2000pru.googlegroups.com>:

>On May 19, 5:46�pm, "Tim Williams" <tmoran...(a)charter.net> wrote:
>> "Bitrex" <bit...(a)de.lete.earthlink.net> wrote in message
>>
>> news:E-ydndNy_Iic7GnWnZ2dnUVZ_gednZ2d(a)earthlink.com...
>>
>> > I'd love to try it out, but I'm an AVR guy - I wonder how difficult it
>> > would be to port the code to use on something like an ATMega168....
>>
>> Considering how awful the PIC is, that could take a while :)
>
>I always use the CDP1802 as the reference for awful instruction sets.
>
> A = B + C
>
>needs 16 instructions in an 1802. Compared to it, the PIC is not too
>bad.

The PIC 18F has an 8 bit hardware multiplier
So for A7:A0 x B7:B0 -> C15:C0
in one instruction

It also has very nice compares:
cpfseq compare register F with accumulator, skip next instruction if equal
spfsgt same, but less than
cpfslt same, but greater then

Saves testing status register zero flag, carry, etc.

I have used these a lot, have not used the hardware multiply,
could be nice for some filters.

And of course all the bit set, bit clear, and bit test instructions on any register
or RAM location.
Suits me well.


From: Jan Panteltje on
On a sunny day (Thu, 20 May 2010 14:16:47 GMT) it happened Jan Panteltje
<pNaonStpealmtje(a)yahoo.com> wrote in <ht3g8k$on7$1(a)news.albasani.net>:spfsgt same, but less than

>cpfsgt same, but less then
>cpfslt same, but greater then

Oops, other way around of course :-)

From: D Yuniskis on
MooseFET wrote:
> On May 19, 5:46 pm, "Tim Williams" <tmoran...(a)charter.net> wrote:
>> "Bitrex" <bit...(a)de.lete.earthlink.net> wrote in message
>>
>> news:E-ydndNy_Iic7GnWnZ2dnUVZ_gednZ2d(a)earthlink.com...
>>
>>> I'd love to try it out, but I'm an AVR guy - I wonder how difficult it
>>> would be to port the code to use on something like an ATMega168....
>> Considering how awful the PIC is, that could take a while :)
>
> I always use the CDP1802 as the reference for awful instruction sets.

Actually, I always thought the original PIC's had the most godawful
instruction sets (back in the "GI" days when they were used
almost exclusively in STB's, etc.).

The 99000's instruction set (and programming model) was a bit
difficult to get used to.

The 8x300 *really* was crippled -- but *fast* (for its day).

And I could never wrap my head around the i432. Just too "radical"
for my sensibilities (at the time), I guess... :<

All time *favorite* was the NS32000 (nee 16032) -- though it
was riddled with bugs :<

It is amusing to look back and see which features became
prevalent and which *essential* as the designs evolved.
E.g., many early machines didn't support a stack. Nowadays,
even microchip has realized the benefit of this approach :-/
(some early machines didn't support IRQ's!)

OTOH, it is disappointing to see how many peripherals have
*lost* functionality -- functionality that really isn't
costly to provide. :<
From: Didi on
On May 20, 10:01 am, Bitrex <bit...(a)de.lete.earthlink.net> wrote:
> .......
> Atmel sez:
>
> "Many people believe RISC is an acronym for "Reduced Instruction Set
> Computer", and that a RISC must have a limited number of instructions.
> But those familiar with the history of how the terms RISC and CISC were
> coined will know that RISC is an acronym for "Reduced COMPLEXITY
> Instruction Set Computer". But because RCISC didn't sound very elegant,
> the acronym RISC was applied to the theory.

If we compare RISC to CISC we should perhaps compare the top
architectures of both worlds. Choosing 68k for CISC and power (PPC)
for RISC for the purpose would be reasonable, I guess.

Beautiful as the 68k instruction set & architecture were, power was
a huge step forward. However, the power mnemonics as originally
developed make assembly programming totally impractical, it would
be insane to start even a small project on that.
Once the 68k assembly evolved into VPA usable with power it became
evident that it costs very little more memory to write for the RISC
architecture. [Assembling original 68k - cpu32, actually - sources
results into about 3.5 times more memory; however, this without
optimization, more than half of the code does unnecessary
maintenance of the correct condition code etc. compatibility stuff.
If written with power in mind the code size gets very close to
original 68k code size, certainly < twice that. Not so bad for
a 32 bit instruction word vs. a 16 bit min. one.].

And for a comparison between different ages consider this:
a 200MHz power (603e, 8240 precisely) emulating a 2 MHz 6809
system in a DPS window was measured to be about 40 times
faster than the original. A penalty of just above 2
times for emulation, not so bad at all (IIRC I tried it
assembling stuff which used to take a few minutes on the
original system under MDOS09).

Dimiter

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