Software PLL (SPLL)
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From: Jerry Avins on 8 Feb 2006 14:58 Ron N. wrote: > Dougal McDougal of that Elk wrote: > >>You need to watch the stability - ie phase margin. Make sure you sample at >>about ten times the unity gain cross-over freq. Your unity gain freq could >>be around 12Hz - this should filter out the 2f at 120Hz. You may also need a >>phase-lead compensator depending on the number of integrators you want (ie >>for just the VCO you have one integrator - but you can add a phase-lag to >>increase the slope). You need a Bode Plot in your head or on paper.If you >>use a low-pass filter this will introduce phase lag and the amount depends >>on the order of teh filter. The more you filter, the less 2f carrier >>feedthrough but the more instability. > > > Since this is being done in software, can't one get rid of all the > phase lead/lag problems by using identical linear phase FIR filters on > both the reference input and the VCO? the delay of those filters is as harmful as phase lag. Filters used in feedback should be "prompt"; as close to minimum phase as practical. Jerry -- Engineering is the art of making what you want from things you can get. ???????????????????????????????????????????????????????????????????????
From: Tim Wescott on 8 Feb 2006 17:19 Ron N. wrote: > Dougal McDougal of that Elk wrote: > >>You need to watch the stability - ie phase margin. Make sure you sample at >>about ten times the unity gain cross-over freq. Your unity gain freq could >>be around 12Hz - this should filter out the 2f at 120Hz. You may also need a >>phase-lead compensator depending on the number of integrators you want (ie >>for just the VCO you have one integrator - but you can add a phase-lag to >>increase the slope). You need a Bode Plot in your head or on paper.If you >>use a low-pass filter this will introduce phase lag and the amount depends >>on the order of teh filter. The more you filter, the less 2f carrier >>feedthrough but the more instability. > > > Since this is being done in software, can't one get rid of all the > phase lead/lag problems by using identical linear phase FIR filters on > both the reference input and the VCO? > > Thanks. What's important isn't the mismatch in phase between the reference and VCO; it's the total phase lag between a loop disturbance and the system's response to it that will make or break a control loop. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
From: Ron N. on 8 Feb 2006 20:48 Tim Wescott wrote: > Ron N. wrote: > > Since this is being done in software, can't one get rid of all the > > phase lead/lag problems by using identical linear phase FIR filters > > on both the reference input and the VCO? .... > What's important isn't the mismatch in phase between the reference > and VCO; it's the total phase lag between a loop disturbance and the > system's response to it that will make or break a control loop. I can't remember a single thing from my control systems course from many years past, so I'm probably asking some stupid questions. Would using minimum phase filters instead of linear phase ones (with the same frequency respose) cause any problems? IMHO. YMMV. -- rhn A.T nicholson d.0.t C-o-M
From: Ken Smith on 8 Feb 2006 21:30 In article <MtUFf.134879$vH5.1122485(a)news.xtra.co.nz>, Dougal McDougal of that Elk <FU2(a)yahoo.co.zpc> wrote: [...] >You need to watch the stability - ie phase margin. Make sure you sample at >about ten times the unity gain cross-over freq. Ten times is a bit more than you really really need. 5 will work with some extra effort. > Your unity gain freq could >be around 12Hz - this should filter out the 2f at 120Hz. You may also need a >phase-lead compensator depending on the number of integrators you want (ie >for just the VCO you have one integrator - but you can add a phase-lag to >increase the slope). To extend this comment a little: Generally, you want 2 poles and a zero in the PLL's filter. One pole is well below the gain cross over. The zero is just about at the gain cross over and the 2nd pole is well above. If you plot out a Bode plot you'll see why this works well. In a multiplying PLL, you often can create a signal to mostly cancel the 2F signal in the filter. Also, a tri-stating phase detector doesn't make much 2F at all. You can also do things like add a notch up at the 2F point too if you need to supress it further. -- -- kensmith(a)rahul.net forging knowledge
From: Ken Smith on 8 Feb 2006 21:37 In article <1139426514.841712.37900(a)f14g2000cwb.googlegroups.com>, Ron N. <rhnlogic(a)yahoo.com> wrote: >Mark wrote: > >> A software PLL is based on an NCO and an NCO unlike a VCO has a minimum >> step size so it can only achieve a number of discrete frequencies, i.e. >> the output frequency is quantized. > >Why do you say this? Perhaps because this is what he has seen. > An NCO is, of course based on some digital >number representation; but if you use IEEE doubles, the quantization >error of the phase is much smaller than the thermal noise of any >analog oscillator, maybe even smaller than the quantum limits >physics allows any analog VCO. IEEE doubles requires some serious amount of electronics and is not really the best way to go. You do better with a 64 bit fixed point system. I've done quite a few digital PLL systems and have never needed to go beyond about 32 bits to get good results. Still if you are making a square wave on the output you have 1 clocks worth of jitter. -- -- kensmith(a)rahul.net forging knowledge
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