From: George Jefferson on
When coupling capacitors are used to remove DC offsets between stages, does
there exist a dc component during startup? I notice that when I watch the dc
after a coupling cap that it starts out with a large dc component which goes
to zero. I assume this is because the cap is charging and eventually charges
to the dc component which blocks it resuling in a net 0 voltage after the
cap?


Suppose I have an amplifier stage and I couple it to that of a jfet. In this
case the gate is "floating". We could add a large resistance to ground
it(lets say it requires a very large resistance to prevent loading... 10M or
more). But will the gate initially have a large dc component which could
potentially ruin the jfet?


e.g., I have a very high ouput impedence(~1M-10M) transducer with a high
supply voltage(~1kV) and a relatively large DC offset(> 100V). I would like
to create an amplifier.

I've tried a bjt but it simply loads the signal too much and I can't get the
transistor out of cutoff without drawing too much current through the
resistors(trying to use 1/4W or 1/2W). When I do load the signal/heat the
bias resistors I can get some amplification(finally get out of cutoff) but
the signal is distorted because of loading and probably because it is too
close to cutoff.

Therefore I figured I could use a common source amp. Of course now I have to
worry about blowing the gate. The signal switch is within spec but the dc
offset would easily ruin it if it gets through the cap.


Anything I could do? It would be a relatively straightforward problem if the
output impedance and voltages weren't so high. I would like to use basic
techniques if possible rather than some exotic method.

If I could in some way buffer the signal then I can get away from the
loading issues which is really the only problem I'm having.

Obviously some floating gate method would work but the only thing I can
think of is a transformer and I'm not willing to go there.



From: George Jefferson on
I should be a bit more clear(sorry, been up all night)...

The problem is that the previous stage has high output impedance and all the
amplifier configurations requires some type of biasing. If the biasing
resistors are to form a stiff voltage divider to prevent loading then they
must be much larger than the output impedance of the previous stage. This
requires them to be on the order of about 100M to 10G depending on the amp
configuration. While I suppose this might work for some mosfets(such as the
common drain) it doesn't work with any bjt's. I'm not sure I have any
resistors above 10M to even test it and I imagine it would cause other
problems?