Twin T circuit wanted
in [Design]
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From: Winfield Hill on 9 Jun 2010 21:54 Jim Thompson wrote... > > John Larkin wrote: > > [snip] >> >> The cool thing is that the collector swing is almost exactly 2xVcc >> peak-to-peak. As the amplitude builds up, at the negative swing peak >> the emitter goes a little bit negative, to get out of the way, and the >> collector swings to just about ground. That forward-biases the c-b >> junction and discharges the base cap, reducing transistor base current >> hence gain. So it has a built-in peak detecting AGC amplitude >> leveling loop with close to zero TC. All from 5 parts. Or sometimes >> six. What's the 6th part, I wonder? > I know John won't respond, but could someone, perhaps Win, tell me > how the "AGC" works? I'm sure he would, but why should I, over the years you've insulted me at least as much as him, and perhaps more aggressively? Anyway, he did explain it, SFAICT. Note the BJT is over-biased - plenty of base current, that if left unchecked would charge the base-to-ground capacitor and over-current the transistor. So the oscillator runs and examining cycle-by-cycle, the collector swings higher and higher until it goes negative with respect to the base voltage, close to saturating the transistor, and turning on the base-collector diode a bit, robbing current from the base capacitor. This process servos the BJT current to just the right level to sustain an oscillation collector-voltage level where just the right amount of current is robbed each cycle to control the base voltage. Thereby insuring that the collector goes close to the emitter on each cycle, establishing a tightly-controlled amplitude, which as John pointed out, is temperature independent to first order since Vce(sat) is relatively temperature independent. John said Vcc peak, but actually it must be closer to Vcc - Vce(sat). -- Thanks, - Win
From: Jim Thompson on 9 Jun 2010 22:00 On 9 Jun 2010 18:54:01 -0700, Winfield Hill <Winfield_member(a)newsguy.com> wrote: >Jim Thompson wrote... >> >> John Larkin wrote: >> >> [snip] >>> >>> The cool thing is that the collector swing is almost exactly 2xVcc >>> peak-to-peak. As the amplitude builds up, at the negative swing peak >>> the emitter goes a little bit negative, to get out of the way, and the >>> collector swings to just about ground. That forward-biases the c-b >>> junction and discharges the base cap, reducing transistor base current >>> hence gain. So it has a built-in peak detecting AGC amplitude >>> leveling loop with close to zero TC. All from 5 parts. Or sometimes >>> six. > > What's the 6th part, I wonder? > >> I know John won't respond, but could someone, perhaps Win, tell me >> how the "AGC" works? > > I'm sure he would, but why should I, over the years you've insulted > me at least as much as him, and perhaps more aggressively? > > Anyway, he did explain it, SFAICT. > > Note the BJT is over-biased - plenty of base current, that if left > unchecked would charge the base-to-ground capacitor and over-current > the transistor. So the oscillator runs and examining cycle-by-cycle, > the collector swings higher and higher until it goes negative with > respect to the base voltage, close to saturating the transistor, > and turning on the base-collector diode a bit, robbing current from > the base capacitor. This process servos the BJT current to just the > right level to sustain an oscillation collector-voltage level where > just the right amount of current is robbed each cycle to control the > base voltage. Thereby insuring that the collector goes close to the > emitter on each cycle, establishing a tightly-controlled amplitude, > which as John pointed out, is temperature independent to first order > since Vce(sat) is relatively temperature independent. > > John said Vcc peak, but actually it must be closer to Vcc - Vce(sat). I'll buy that the collector forwards biases, and you enter a limit cycle. Thus I'd call it ALC. I don't see any _gain_ variation that "AGC" would imply. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The only thing bipartisan in this country is hypocrisy
From: Winfield Hill on 9 Jun 2010 22:18 Jim Thompson wrote... > >>> I know John won't respond, but could someone, perhaps Win, tell me >>> how the "AGC" works? >> >> I'm sure he would, but why should I, over the years you've insulted >> me at least as much as him, and perhaps more aggressively? >> >> Anyway, he did explain it, SFAICT. >> >> Note the BJT is over-biased - plenty of base current, that if left >> unchecked would charge the base-to-ground capacitor and over-current >> the transistor. So the oscillator runs and examining cycle-by-cycle, >> the collector swings higher and higher until it goes negative with >> respect to the base voltage, close to saturating the transistor, >> and turning on the base-collector diode a bit, robbing current from >> the base capacitor. This process servos the BJT current to just the >> right level to sustain an oscillation collector-voltage level where >> just the right amount of current is robbed each cycle to control the >> base voltage. Thereby insuring that the collector goes close to the >> emitter on each cycle, establishing a tightly-controlled amplitude, >> which as John pointed out, is temperature independent to first order >> since Vce(sat) is relatively temperature independent. >> >> John said Vcc peak, but actually it must be closer to Vcc - Vce(sat). > > I'll buy that the collector forwards biases, and you enter a limit > cycle. Thus I'd call it ALC. I don't see any _gain_ variation that > "AGC" would imply. Picky, picky. To my mind, the base current robbed by the collector starves the base, lowering the CE stage's gain, until the exact equilibrium is achieved. ALC, AGC, pick your name as you like. Either way it gets the job done rather nicely, and is a bit different from what we've seen elsewhere, such as in old radio circuits. I see that it has been analyzed as a possible RF oscillator technique. But it seems to me that, working as we imagine, Vce(sat) and all, this trick would be limited to far far below fT. -- Thanks, - Win
From: John Larkin on 9 Jun 2010 23:42 On 9 Jun 2010 18:54:01 -0700, Winfield Hill <Winfield_member(a)newsguy.com> wrote: >Jim Thompson wrote... >> >> John Larkin wrote: >> >> [snip] >>> >>> The cool thing is that the collector swing is almost exactly 2xVcc >>> peak-to-peak. As the amplitude builds up, at the negative swing peak >>> the emitter goes a little bit negative, to get out of the way, and the >>> collector swings to just about ground. That forward-biases the c-b >>> junction and discharges the base cap, reducing transistor base current >>> hence gain. So it has a built-in peak detecting AGC amplitude >>> leveling loop with close to zero TC. All from 5 parts. Or sometimes >>> six. > > What's the 6th part, I wonder? The peak detection can put a tiny flat on the negative swing of the sine wave. A small resistor in series with the collector fixes that and doesn't seem to do a lot of harm otherwise. > >> I know John won't respond, but could someone, perhaps Win, tell me >> how the "AGC" works? > > I'm sure he would, but why should I, over the years you've insulted > me at least as much as him, and perhaps more aggressively? But he didn't insult your wife, too. > Anyway, he did explain it, SFAICT. > > Note the BJT is over-biased - plenty of base current, that if left > unchecked would charge the base-to-ground capacitor and over-current > the transistor. So the oscillator runs and examining cycle-by-cycle, > the collector swings higher and higher until it goes negative with > respect to the base voltage, close to saturating the transistor, > and turning on the base-collector diode a bit, robbing current from > the base capacitor. This process servos the BJT current to just the > right level to sustain an oscillation collector-voltage level where > just the right amount of current is robbed each cycle to control the > base voltage. Thereby insuring that the collector goes close to the > emitter on each cycle, establishing a tightly-controlled amplitude, > which as John pointed out, is temperature independent to first order > since Vce(sat) is relatively temperature independent. > > John said Vcc peak, but actually it must be closer to Vcc - Vce(sat). Oh, picky picky. It's actually, probably, a bit more complex, since the emitter is a little negative at the instant of collision, and the transistor is almost saturating, so some of the stolen base current is going into the collector and some is going into the emitter. It would be interesting to simulate, just to see where the currents really go. Adding the collector resistor changes things, too. But the AGC thing does work, and the TC is close to zero. John
From: John Larkin on 9 Jun 2010 23:46
On 9 Jun 2010 19:18:40 -0700, Winfield Hill <Winfield_member(a)newsguy.com> wrote: >Jim Thompson wrote... >> >>>> I know John won't respond, but could someone, perhaps Win, tell me >>>> how the "AGC" works? >>> >>> I'm sure he would, but why should I, over the years you've insulted >>> me at least as much as him, and perhaps more aggressively? >>> >>> Anyway, he did explain it, SFAICT. >>> >>> Note the BJT is over-biased - plenty of base current, that if left >>> unchecked would charge the base-to-ground capacitor and over-current >>> the transistor. So the oscillator runs and examining cycle-by-cycle, >>> the collector swings higher and higher until it goes negative with >>> respect to the base voltage, close to saturating the transistor, >>> and turning on the base-collector diode a bit, robbing current from >>> the base capacitor. This process servos the BJT current to just the >>> right level to sustain an oscillation collector-voltage level where >>> just the right amount of current is robbed each cycle to control the >>> base voltage. Thereby insuring that the collector goes close to the >>> emitter on each cycle, establishing a tightly-controlled amplitude, >>> which as John pointed out, is temperature independent to first order >>> since Vce(sat) is relatively temperature independent. >>> >>> John said Vcc peak, but actually it must be closer to Vcc - Vce(sat). >> >> I'll buy that the collector forwards biases, and you enter a limit >> cycle. Thus I'd call it ALC. I don't see any _gain_ variation that >> "AGC" would imply. > > Picky, picky. To my mind, the base current robbed by the > collector starves the base, lowering the CE stage's gain, > until the exact equilibrium is achieved. ALC, AGC, pick > your name as you like. Either way it gets the job done > rather nicely, and is a bit different from what we've seen > elsewhere, such as in old radio circuits. I see that it > has been analyzed as a possible RF oscillator technique. > But it seems to me that, working as we imagine, Vce(sat) > and all, this trick would be limited to far far below fT. When I post circuits, JT and JF pull out dictionaries and start arguing about what words mean. Circuits don't spend much time reading dictionaries. John |