Ultra low frequency VCO
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From: Tim Wescott on 13 Jul 2010 01:54 On 07/12/2010 08:43 PM, Phil Hobbs wrote: > Tim Wescott wrote: >> On 07/08/2010 12:29 PM, Phil Hobbs wrote: >>> Paul Keinanen wrote: >>>> On Tue, 06 Jul 2010 09:52:43 -0700, Tim Wescott <tim(a)seemywebsite.com> >>>> wrote: >>>> >>>>> On 07/06/2010 09:10 AM, Daku wrote: >>>>>> On Jul 5, 8:59 pm, Tim Wescott<t...(a)seemywebsite.com> wrote: >>>>>>> I'd hardly call 60Hz "ultra low frequency". But it is pretty darned >>>>>>> low. >>>>>>> >>>>>>> All the suggestions you've gotten so far are good as far as they go >>>>>>> and >>>>>>> may well be perfect -- but what are you trying to do? Do you need >>>>>>> sine >>>>>>> wave out or square? If sine wave, how pure? Do you have any >>>>>>> specifications on jitter, phase noise, or frequency accuracy? >>>>>> I am trying to design a PLL for very low frequencies, e.g., power >>>>>> line >>>>>> grid. >>>>>> I am concerned with the VCO as it is a crucial sub-circuit. I am >>>>>> aiming for >>>>>> a phase noise of approximately -100 dBc/Hz but not very sure of the >>>>>> offset >>>>>> frequency. Ideally, I would like to have frequency accuracy of 1 - 5% >>>>>> at most. >>>>>> Also, I am aware that S-parameter methods are not appropriate at >>>>>> these >>>>>> low >>>>>> frequencies. >>>> >>>> If you want to track the _actual_ mains frequency, just use a mains >>>> driven synchronous motor. To get the noise sidebands down, use some >>>> flywheels :-). >>>> >>>>> I think that those specs would be difficult to achieve with an >>>>> all-analog oscillator running at 60Hz. Not impossible -- I could do >>>>> it, and Joerg could do it in a fraction of the time I'd take. Using >>>>> some sort of direct digital synthesis -- even if it's just a >>>>> microprocessor -- running off of a crystal reference would be almost >>>>> trivial in comparison and would probably take less board space and >>>>> would be far more repeatable in manufacturing. >>>>> >>>>> If you just had to do this purely in the analog domain your best bet >>>>> might be a pair of crystal oscillators, frequency steered with >>>>> varactors, carefully built, and with their outputs mixed down to >>>>> 60Hz. But that's a solution I would expect to see in a bit of kit >>>>> from the 50's through the 80's -- anything later and I'd expect to >>>>> see a DDS. >>>> >>>> Just a few minutes ago, the Nordel AC network (Danish isles, Finland, >>>> Norway, Sweden) was running at 50.11 Hz or +2200 ppm above nominal in >>>> order to allow the mains synchronized clocks to catch up. >>>> A simple fundamental frequency VXCO can be pulled about +/-100 ppm >>>> with the load capacitance. About 1000 ppm is the maximum with >>>> adjustable serial inductance and adjustable parallel load capacitance >>>> at the crystal. >>>> >>>> At 50/60 Hz, even a trivial processor can generate a variable >>>> frequency sine wave using the NCO (Numerically Controlled Oscillator) >>>> principle to generate a sine wave, which can be locked to the incoming >>>> signal in some loop configuration. >>>> >>>> Even a trivial processor might be able to generate both sine and >>>> cosine waveforms for 49.98, 50.00. 50.92 Hz etc. in parallel and >>>> performing a phase comparison between all these in parallel to >>>> determine the best match. >>>> >>> >>> I don't know that -100 dBc/Hz is that hard at 60 Hz. I bet you could do >>> that by running a bog standard multivibrator at 1024*1024*60 Hz and >>> dividing down. You'd need a sine shaper, but the phase noise goes down >>> by N**2, so you'd get 100 dB improvement just from that. Alternatively, >>> you could make an LC VCO and divide that down. >> >> This actually kind of makes my point, which I didn't state clearly: if >> you _don't_ use a divider it'll be hard. With a divider it gets easy, >> as long as you ignore clock jitter in the divider (and clock jitter >> probably isn't a big deal, given the output frequency). >> >>> You might even be able to do it with all analog--the OPA378 has 20 >>> nV/sqrt(Hz) all the way down to DC. With a 5V sine wave at 60 Hz, that's >>> something like 1800 V/s, so 20 nV gives you something like 10 >>> picoseconds per root hertz. You probably lose a factor of sqrt(2) in >>> there, but that ought to be good enough. Your ALC network would >>> contribute more than that, almost for sure. >> >> Depending on how close to the carrier you want to get, you lose a >> factor of up to infinity (if you get _really_ close to the carrier). >> >> The noise gain is something like 1/(s^2 + w0^2) -- it's an oscillator. >> Worse, because it's an RC, the constant you're multiplying by is >> greater than one -- I get Hn(s) ~ 15/(s^2 + w0^2). That's not taking >> the current noise of the part into account (which, I admit, I haven't >> checked on because I'm lazy). >> >> 1Hz away your noise gain is just about 200, for 4uV/sqrt(Hz). That's >> doing OK, but at 0.1Hz away the noise gain is about 2000 -- all you >> have to do is measure close enough to the carrier at a wide enough >> bandwidth and your noise is too high (sure would be nice if the OP >> specified what he wanted, but I think we lost him). >> > > Sorry to be slow responding. That's an interesting point about the noise > gain of the oscillator. I think we agree that the OPA378 is okay down to > 1 Hz offset or thereabouts, anyway. (It's a very nice part btw--I'm > using it in some millihertz things just now.) > Actually I realized what's been bothering me about this whole thread as I wrote the above today. Just specifying 100dBc is practically meaningless -- any oscillator is going to have some phase noise, and it's going to grow the closer you get to the carrier. White noise in the amplifying element will turn into noise that goes as 1/(f-f0), and no matter what you do you'll have 1/f noise in the amplifying element that'll start cutting in at _some_ point. So you can always make any 60Hz oscillator meet a 100dBc requirement -- just find a bandwidth for the measurement that makes it work. Ditto, you can take any oscillator and narrow up the bandwidth around the carrier to make it fail just about any dBc phase noise requirement. Even a super-zoot cesium fountain oscillator is going to have "phase noise" that exceeds 100dBc if you wait around long enough. So I guess that all of the suggestions that have been given will work. Or none of them. Or some, if only the OP would tell us the rest of his requirement. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
From: Geoff C on 13 Jul 2010 02:42 > > So I guess that all of the suggestions that have been given will work. > Or none of them. Or some, if only the OP would tell us the rest of > his requirement. > The OP seems to be interested in syncing his PV solar system to the grid, at least thats what I infer from reading some other of his posts. Kind of makes the 100dBc spec look silly if so.
From: Tim Wescott on 13 Jul 2010 11:36 On 07/12/2010 11:42 PM, Geoff C wrote: >> >> So I guess that all of the suggestions that have been given will work. >> Or none of them. Or some, if only the OP would tell us the rest of >> his requirement. >> > > The OP seems to be interested in syncing his PV solar system to the grid, > at least thats what I infer from reading some other of his posts. Kind of > makes the 100dBc spec look silly if so. No kidding! If he's within 10 degrees one way or another that's probably plenty good. Of far greater concern with PV usage is making sure that putting what is essentially a negative resistance on the line won't cause instability, or at least knowing exactly what conditions will lead to instability so that you may avoid them during installation. Particularly if you're going to move from your lab with one or two PV panels attached to a good solid grid, to some solar farm out in the boonies where your PV array is the biggest power source for miles. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
From: Phil Hobbs on 13 Jul 2010 13:04 Tim Wescott wrote: > On 07/12/2010 08:43 PM, Phil Hobbs wrote: >> Tim Wescott wrote: >>> On 07/08/2010 12:29 PM, Phil Hobbs wrote: >>>> Paul Keinanen wrote: >>>>> On Tue, 06 Jul 2010 09:52:43 -0700, Tim Wescott <tim(a)seemywebsite.com> >>>>> wrote: >>>>> >>>>>> On 07/06/2010 09:10 AM, Daku wrote: >>>>>>> On Jul 5, 8:59 pm, Tim Wescott<t...(a)seemywebsite.com> wrote: >>>>>>>> I'd hardly call 60Hz "ultra low frequency". But it is pretty darned >>>>>>>> low. >>>>>>>> >>>>>>>> All the suggestions you've gotten so far are good as far as they go >>>>>>>> and >>>>>>>> may well be perfect -- but what are you trying to do? Do you need >>>>>>>> sine >>>>>>>> wave out or square? If sine wave, how pure? Do you have any >>>>>>>> specifications on jitter, phase noise, or frequency accuracy? >>>>>>> I am trying to design a PLL for very low frequencies, e.g., power >>>>>>> line >>>>>>> grid. >>>>>>> I am concerned with the VCO as it is a crucial sub-circuit. I am >>>>>>> aiming for >>>>>>> a phase noise of approximately -100 dBc/Hz but not very sure of the >>>>>>> offset >>>>>>> frequency. Ideally, I would like to have frequency accuracy of 1 >>>>>>> - 5% >>>>>>> at most. >>>>>>> Also, I am aware that S-parameter methods are not appropriate at >>>>>>> these >>>>>>> low >>>>>>> frequencies. >>>>> >>>>> If you want to track the _actual_ mains frequency, just use a mains >>>>> driven synchronous motor. To get the noise sidebands down, use some >>>>> flywheels :-). >>>>> >>>>>> I think that those specs would be difficult to achieve with an >>>>>> all-analog oscillator running at 60Hz. Not impossible -- I could do >>>>>> it, and Joerg could do it in a fraction of the time I'd take. Using >>>>>> some sort of direct digital synthesis -- even if it's just a >>>>>> microprocessor -- running off of a crystal reference would be almost >>>>>> trivial in comparison and would probably take less board space and >>>>>> would be far more repeatable in manufacturing. >>>>>> >>>>>> If you just had to do this purely in the analog domain your best bet >>>>>> might be a pair of crystal oscillators, frequency steered with >>>>>> varactors, carefully built, and with their outputs mixed down to >>>>>> 60Hz. But that's a solution I would expect to see in a bit of kit >>>>>> from the 50's through the 80's -- anything later and I'd expect to >>>>>> see a DDS. >>>>> >>>>> Just a few minutes ago, the Nordel AC network (Danish isles, Finland, >>>>> Norway, Sweden) was running at 50.11 Hz or +2200 ppm above nominal in >>>>> order to allow the mains synchronized clocks to catch up. >>>>> A simple fundamental frequency VXCO can be pulled about +/-100 ppm >>>>> with the load capacitance. About 1000 ppm is the maximum with >>>>> adjustable serial inductance and adjustable parallel load capacitance >>>>> at the crystal. >>>>> >>>>> At 50/60 Hz, even a trivial processor can generate a variable >>>>> frequency sine wave using the NCO (Numerically Controlled Oscillator) >>>>> principle to generate a sine wave, which can be locked to the incoming >>>>> signal in some loop configuration. >>>>> >>>>> Even a trivial processor might be able to generate both sine and >>>>> cosine waveforms for 49.98, 50.00. 50.92 Hz etc. in parallel and >>>>> performing a phase comparison between all these in parallel to >>>>> determine the best match. >>>>> >>>> >>>> I don't know that -100 dBc/Hz is that hard at 60 Hz. I bet you could do >>>> that by running a bog standard multivibrator at 1024*1024*60 Hz and >>>> dividing down. You'd need a sine shaper, but the phase noise goes down >>>> by N**2, so you'd get 100 dB improvement just from that. Alternatively, >>>> you could make an LC VCO and divide that down. >>> >>> This actually kind of makes my point, which I didn't state clearly: if >>> you _don't_ use a divider it'll be hard. With a divider it gets easy, >>> as long as you ignore clock jitter in the divider (and clock jitter >>> probably isn't a big deal, given the output frequency). >>> >>>> You might even be able to do it with all analog--the OPA378 has 20 >>>> nV/sqrt(Hz) all the way down to DC. With a 5V sine wave at 60 Hz, >>>> that's >>>> something like 1800 V/s, so 20 nV gives you something like 10 >>>> picoseconds per root hertz. You probably lose a factor of sqrt(2) in >>>> there, but that ought to be good enough. Your ALC network would >>>> contribute more than that, almost for sure. >>> >>> Depending on how close to the carrier you want to get, you lose a >>> factor of up to infinity (if you get _really_ close to the carrier). >>> >>> The noise gain is something like 1/(s^2 + w0^2) -- it's an oscillator. >>> Worse, because it's an RC, the constant you're multiplying by is >>> greater than one -- I get Hn(s) ~ 15/(s^2 + w0^2). That's not taking >>> the current noise of the part into account (which, I admit, I haven't >>> checked on because I'm lazy). >>> >>> 1Hz away your noise gain is just about 200, for 4uV/sqrt(Hz). That's >>> doing OK, but at 0.1Hz away the noise gain is about 2000 -- all you >>> have to do is measure close enough to the carrier at a wide enough >>> bandwidth and your noise is too high (sure would be nice if the OP >>> specified what he wanted, but I think we lost him). >>> >> >> Sorry to be slow responding. That's an interesting point about the noise >> gain of the oscillator. I think we agree that the OPA378 is okay down to >> 1 Hz offset or thereabouts, anyway. (It's a very nice part btw--I'm >> using it in some millihertz things just now.) >> > Actually I realized what's been bothering me about this whole thread as > I wrote the above today. Just specifying 100dBc is practically > meaningless -- any oscillator is going to have some phase noise, and > it's going to grow the closer you get to the carrier. White noise in > the amplifying element will turn into noise that goes as 1/(f-f0), and > no matter what you do you'll have 1/f noise in the amplifying element > that'll start cutting in at _some_ point. So you can always make any > 60Hz oscillator meet a 100dBc requirement -- just find a bandwidth for > the measurement that makes it work. Ditto, you can take any oscillator > and narrow up the bandwidth around the carrier to make it fail just > about any dBc phase noise requirement. Even a super-zoot cesium > fountain oscillator is going to have "phase noise" that exceeds 100dBc > if you wait around long enough. > > So I guess that all of the suggestions that have been given will work. > Or none of them. Or some, if only the OP would tell us the rest of his > requirement. > Genuine phase noise sidebands have flat tops, so they aren't as sensitive to modulation frequency as FM noise. Various authors go to various lengths in trying to identify regions where the noise goes as 1/f, 1/f**2,.... I expect that the OP just wanted a 60 Hz oscillator that was quiet enough that he didn't have to worry about it, due to being hip deep in alligators of another species. (I actually have a confirmed seat on the one flight from ATL to JFK that looks like making it this afternoon--all the LGA and EWR (La Guardia and Newark) folk are upschkrauen. Gotta run.) Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal ElectroOptical Innovations 55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net
From: j on 13 Jul 2010 13:22
> Genuine phase noise sidebands have flat tops, so they aren't as > sensitive to modulation frequency as FM noise. Various authors go to > various lengths in trying to identify regions where the noise goes as > 1/f, 1/f**2,.... What in the world are you saying? Sounds kind of ignorant to me but Ill reserve judgment until you answer. I made a living at designing multiloop uw / rf synthesizers and taking this statement as fact sure wouldnt have helped. regards |