From: John Larkin on
On Mon, 17 May 2010 09:35:50 +0200, "aleksa" <aleksazr(a)gmail.com>
wrote:

>When I started designing PCBs, I was given an advice
>to route GND with 50mils and VCC with 25mils.
>
>But now I read on the net that VCC should be wide, also.
>
>I make two-layer digital boards only.
>
>If I now adjust my VCC tracks to 50mils,
>is there any chance of some problems?
>
>And should I adjust? All prior boards work...
>
>Maybe I should note that all my previous boards
>were built around discreet chips, GALs, SRAM and Z80,
>but am now moving towards 180 MHz ARM and FPGA.
>

It's going to be interesting to try to get an ARM or an FPGA to work
on a 2-layer board. The Vcc and ground current spikes can be horrific
for a fast, many-pin chip, and a wimpy routed (non-plane) ground
structure will cause nasty ground bounce noise.

Four layers is about the minimum for decent power and signal integrity
on a high-speed board (signals, ground, power pours, signals.) 6 or 8
if you have high density or BGA parts. Most FPGAs need three power
supplies, heavily bypassed, and that will be really hard to do on a
2-layer board.

Make the ground and Vcc as wide as you can, and stitch them with lots
of bypass caps. Lots of luck.

John

From: krw on
On Mon, 17 May 2010 20:43:41 -0700, John Larkin
<jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote:

>On Mon, 17 May 2010 09:35:50 +0200, "aleksa" <aleksazr(a)gmail.com>
>wrote:
>
>>When I started designing PCBs, I was given an advice
>>to route GND with 50mils and VCC with 25mils.
>>
>>But now I read on the net that VCC should be wide, also.
>>
>>I make two-layer digital boards only.
>>
>>If I now adjust my VCC tracks to 50mils,
>>is there any chance of some problems?
>>
>>And should I adjust? All prior boards work...
>>
>>Maybe I should note that all my previous boards
>>were built around discreet chips, GALs, SRAM and Z80,
>>but am now moving towards 180 MHz ARM and FPGA.
>>
>
>It's going to be interesting to try to get an ARM or an FPGA to work
>on a 2-layer board. The Vcc and ground current spikes can be horrific
>for a fast, many-pin chip, and a wimpy routed (non-plane) ground
>structure will cause nasty ground bounce noise.
>
>Four layers is about the minimum for decent power and signal integrity
>on a high-speed board (signals, ground, power pours, signals.) 6 or 8
>if you have high density or BGA parts. Most FPGAs need three power
>supplies, heavily bypassed, and that will be really hard to do on a
>2-layer board.

Altera's Max-2 CPLDs are available as 3.3V only, though I still wouldn't
attempt a double sided board design with them.

>Make the ground and Vcc as wide as you can, and stitch them with lots
>of bypass caps. Lots of luck.
>
>John
From: Jasen Betts on
On 2010-05-17, aleksa <aleksazr(a)gmail.com> wrote:
> "George Herold" <ggherold(a)gmail.com> wrote in message news:fa2a60df-7a8a-45b0-943a-d5da4e5b4594(a)s41g2000vba.googlegroups.com...
> On May 17, 3:35 am, "aleksa" <aleks...(a)gmail.com> wrote:
>>> If I now adjust my VCC tracks to 50mils,
>>> is there any chance of some problems?
>
>>Problems, there always seems to be problems. Wider traces may or may
>>not cure your problems.

> Anyway, I'll rephrase the question:
> can widening a VCC line make problems?

In a working, but marginal, system any change can "make problems".

http://catb.org/jargon/html/magic-story.html







--- news://freenews.netfront.net/ - complaints: news(a)netfront.net ---
From: Bob Masta on
On Mon, 17 May 2010 22:14:47 +0200, "aleksa"
<aleksazr(a)gmail.com> wrote:

>"George Herold" <ggherold(a)gmail.com> wrote in message news:fa2a60df-7a8a-45b0-943a-d5da4e5b4594(a)s41g2000vba.googlegroups.com...
>On May 17, 3:35 am, "aleksa" <aleks...(a)gmail.com> wrote:
>>> If I now adjust my VCC tracks to 50mils,
>>> is there any chance of some problems?
>
>>Problems, there always seems to be problems. Wider traces may or may
>>not cure your problems.
>
>I didn't say I *have* problems, I asked
>if widening a VCC *may make* problems.
>
>The guy who suggested I should use 25mil VCC
>had an old board, with DIPs, with thick GND
>and thick VCC lines (some 100mils), with caps on
>all chips, but the board didn't work correctly.
>After he had removed the thick VCC line from
>one of the chips, and soldered a thin wire,
>the board worked correctly.
>
>He also said something like "If VCC lines are
>not thick, device will draw spike current from caps,
>rather than the VCC line". Something like that.
>I'm no expert, and I also have to translate it to English...

Your translation is just fine, and what he said
makes a certain amount of sense. He's saying that
the resistance of the Vcc lines plus the bypass
capacitors act as RC filters on each chip, so if
one chip draws a current spike it is "handled"
from its own local C with less disturbance of the
Vcc for other chips.

The question is whether this approach is better
than using a fat Vcc trace (low R) whose voltage
doesn't move around as much in response to spikes
in the first place. My guess is that his approach
may have made a difference on a marginal design,
but the next design might have a completely
different behavior.

>Anyway, I'll rephrase the question:
>can widening a VCC line make problems?

Maybe, if you have a marginal design or layout.
But if you are looking for a general design rule,
I'd go with fat ground and Vcc as the best bet to
avoid the most problems.

Best regards,


Bob Masta

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From: aleksa on
"John Larkin" <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote in message news:b734v55bqgpfdrp97cb011jauogvcqelj9(a)4ax.com...
> It's going to be interesting to try to get an ARM or an FPGA to work
> on a 2-layer board. The Vcc and ground current spikes can be horrific
> for a fast, many-pin chip, and a wimpy routed (non-plane) ground
> structure will cause nasty ground bounce noise.
> Make the ground and Vcc as wide as you can, and stitch them with lots
> of bypass caps. Lots of luck.

I have a working FPGA board, Spartan II XC2S50 TQFP144.
If I replace the PC with ARM, I could even use VQFP100.
The freq is not much, 40 MHz, and I doubt I'll go higher than that.

I've placed vias on every VCC/GND pair and placed caps on the bottom
side. The bottom side is almost free of signals, so there's no problem
connecting the power.

As for the ARM @ 180 MHz... well let's wait and see.
I hear other people made it.