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From: aleksa on 18 May 2010 08:54
"Jasen Betts" <jasen(a)xnet.co.nz> wrote in message news:hstkha$3g4$4(a)reversiblemaps.ath.cx...
> In a working, but marginal, system any change can "make problems".
> http://catb.org/jargon/html/magic-story.html

Considering how complicated things can be,
I wonder sometimes how anything works.


From: aleksa on 18 May 2010 08:58
"George Herold" <ggherold(a)gmail.com> wrote in message news:7857193f-af04-4393-96e6-
> Tim Wescott probably knows a lot more about electronics than I do....
> If you're nice he might help you.

I can't be nice to someone who isn't nice to me.

I asked "can widening a VCC cause problems" and not
"how to calculate needed trace thickness".


From: aleksa on 18 May 2010 09:08
"Bob Masta" <N0Spam(a)daqarta.com> wrote in message news:4bf27919.1501573(a)news.eternal-september.org...
> The question is whether this approach is better
> than using a fat Vcc trace (low R) whose voltage
> doesn't move around as much in response to spikes
> in the first place. My guess is that his approach
> may have made a difference on a marginal design,
> but the next design might have a completely
> different behavior.

Its easy when you have a 4-layer board, but
when you have a 2-layer board you can't
always use thick GND *and* thick VCC.
That was another reason to use thiner lines.

Since I now use smd parts only, all signals are on
top layer so there's plenty of space on the bottom.

Thats why I asked if I should widen my
VCC lines from now on.


From: George Herold on 18 May 2010 10:40
On May 18, 8:58 am, "aleksa" <aleks...(a)gmail.com> wrote:
> "George Herold" <ggher...(a)gmail.com> wrote in message news:7857193f-af04-4393-96e6-
> > Tim Wescott probably knows a lot more about electronics than I do....
> > If you're nice he might help you.
>
> I can't be nice to someone who isn't nice to me.

Oh, that's too bad. You need to have a thick skin around here
sometimes. Wait till you say something stupid and Phil A. jumps on
you. Still there is a vast store of collective knowledge that you can
tap into.

>
> I asked "can widening a VCC cause problems" and not
> "how to calculate needed trace thickness".

Yeah, your original question was not all that clear. Though I think
we get it now.
It sounds like you haven't run into many "ground" problems yet. So
perhaps it's too soon to learn about massive 'power pours' as John L.
calls them. My guess is that as you move to higher frequencies you'll
find that for glitch free operation you will need not just wide ground
traces but a real ground plane.

George H.
From: krw on 18 May 2010 18:49
On Tue, 18 May 2010 15:08:34 +0200, "aleksa" <aleksazr(a)gmail.com> wrote:

>"Bob Masta" <N0Spam(a)daqarta.com> wrote in message news:4bf27919.1501573(a)news.eternal-september.org...
>> The question is whether this approach is better
>> than using a fat Vcc trace (low R) whose voltage
>> doesn't move around as much in response to spikes
>> in the first place. My guess is that his approach
>> may have made a difference on a marginal design,
>> but the next design might have a completely
>> different behavior.

L is usually more important than R.

>Its easy when you have a 4-layer board, but
>when you have a 2-layer board you can't
>always use thick GND *and* thick VCC.
>That was another reason to use thiner lines.

You can't always use a 2-layer board. I wouldn't *think* of it for any
high-speed digital devices, like FPGAs (though the I/Os can often be tuned
down). Even four layers is cutting it close.

>Since I now use smd parts only, all signals are on
>top layer so there's plenty of space on the bottom.
>
>Thats why I asked if I should widen my
>VCC lines from now on.

As wide as possible, absolutely. Cuts down on the L.
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