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From: Anssi Saari on 2 Feb 2010 08:54 Alex <victous(a)gmail.com> writes: > The FPGA supplies serial output data using LVTTL or LVCMOS levels to > the Maxim device, which in turn, converts the logic value to the > appropriate RS-232 voltage level. Likewise, the Maxim device > converts the RS-232 serial input data to LVTTL levels for the FPGA. > A series resistor between the Maxim output pin and the FPGA�s RXD > pin protects against accidental logic conflicts. > I am really puzzled! Why? What you quoted does not mention a UART, what they describe is a bog standard level shifter. I'm not sure if my board is the same as yours, I have a "Spartan 3E 1600 Board" from Digilent, but I think it's the same. The schematic for it shows a MAX3232 connected to the serial ports, which is exactly that, a level shifter. Not a UART. |