From: Michael Plante on
Steve Pope wrote:
>Michael Plante <michael.plante(a)n_o_s_p_a_m.gmail.com> wrote:
>
>>glen herrmannsfeldt wrote:
>
>>>Steve Pope <spope33(a)speedymail.org> wrote:
>
>>>> The first problem, trapping of carriers or migration of atoms
>>>> of some sort, is going to impact twin-transistor RAMs also.
>
>>>You have to be sure that the same data doesn't stay in place
>>>for a long time.
>
>>If this is the primary concern, and as long as people are fantasizing
about
>>future technologies, would it be possible to have a refresh controller
that
>>flips all bits on refresh, remembering which regions have been refreshed
an
>>odd number of times, and selectively inverts them on read-out? I only
know
>>a little about DRAM, so I could be way off...
>
>You could do this; you could also re-write entire blocks of memory
>with a different scrambling pattern XOR's in each time.
>
>But such refresh controllers would be an excellent target for
>exfiltration techniques. :-)


So your basic point is people will steal something to get the secrets if a
"security through obscurity" idea is used. But my point was not to address
encryption (which is, as you've observed, a poor implementation), but,
rather, just to address what sounds like a burn-in issue. Am I
misunderstanding?

Michael

From: GreenXenon on
On Apr 15, 12:34 pm, "Michael Plante"
<michael.plante(a)n_o_s_p_a_m.gmail.com> wrote:


> So your basic point is people will steal something to get the secrets if a
> "security through obscurity" idea is used.  But my point was not to address
> encryption (which is, as you've observed, a poor implementation), but,
> rather, just to address what sounds like a burn-in issue.  


Is there a way to prevent this "burn in" in the Twin-Transistor RAM
chips while still storing data in those chips for a long time?
From: GreenXenon on
On Apr 14, 4:38 pm, glen herrmannsfeldt <g...(a)ugcs.caltech.edu> wrote:


> There have been discussions about possible data retention in
> both SRAM and DRAM, if you keep constant data for a long time.


Oh no!
From: GreenXenon on
On Apr 14, 4:49 pm, spop...(a)speedymail.org (Steve Pope) wrote:
> glen herrmannsfeldt  <g...(a)ugcs.caltech.edu> wrote:
>
> >There have been discussions about possible data retention in
> >both SRAM and DRAM, if you keep constant data for a long time.
>
> Good point -- you might see some carrier trapping in a capacitor that
> has been always charged, relative one that has not.  But you
> won't see a voltage signal -- an actual charge -- after a period of
> usually seconds or minutes.
>
> The first problem, trapping of carriers or migration of atoms
> of some sort, is going to impact twin-transistor RAMs also.
>
> Steve


Is there any type of volatile RAM that is not impacted by carrier-
trapping or atom-migration? I'm getting scared, now.
From: Steve Pope on
GreenXenon <glucegen1x(a)gmail.com> wrote:

>Is there any type of volatile RAM that is not impacted by carrier-
>trapping or atom-migration? I'm getting scared, now.

Good question. These effects scale nonlinearly with field strength
(i.e. volts per meter) so they only started to become bothersome
with finer geometries. They are now commonplace but they may
have been undetectable in older, slower processes.

But if you really want to destroy all past traces of a computer's
activity, you probably need to incinerate it. Periodically
clone your drive, then take the old drive, all your memory,
and the CPU and burn them.

Steve