From: whygee on
Jason Thibodeau wrote:
> I'd like to bump this. Any word on how Ic an stop it from optimizing my
> required logic away? Why wouldn't Xilinx just allow me to turn off
> optimization?
ok in fact I have found the following :
http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir.htm
http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir_keep.htm
http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir_noprune.htm
http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir_preserve.htm
just use these keywords to search in XST's docs.
_o/
yg
--
http://ygdes.com / http://yasep.org
From: Alan Fitch on
On 28/03/10 21:24, whygee wrote:
> Jason Thibodeau wrote:
>> I'd like to bump this. Any word on how Ic an stop it from optimizing my
>> required logic away? Why wouldn't Xilinx just allow me to turn off
>> optimization?
> ok in fact I have found the following :
> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir.htm
> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir_keep.htm
> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir_noprune.htm
> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_dir_preserve.htm
> just use these keywords to search in XST's docs.
> _o/
> yg

Hi Yg - I agree with your proposed solution - however I suggest Jason
looks on the Xilinx website for the correct XST incantations :-;

regards
Alan

--
Alan Fitch
From: modimo on
On 29 Mar, 00:43, Alan Fitch <a...(a)invalid.invalid> wrote:
> On 28/03/10 21:24, whygee wrote:
>
> > Jason Thibodeau wrote:
> >> I'd like to bump this. Any word on how Ic an stop it from optimizing my
> >> required logic away? Why wouldn't Xilinx just allow me to turn off
> >> optimization?
> > ok in fact I have found the following :
> >http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
> >http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
> >http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
> >http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
> > just use these keywords to search in XST's docs.
> > _o/
> > yg
>
> Hi Yg - I agree with your proposed solution - however I suggest Jason
> looks on the Xilinx website for the correct XST incantations :-;
>
> regards
> Alan
>
> --
> Alan Fitch
This should help:
http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/cgd.pdf
keep constraint
regards Modimo
From: Jason Thibodeau on
On 03/28/2010 07:24 PM, modimo wrote:
> On 29 Mar, 00:43, Alan Fitch<a...(a)invalid.invalid> wrote:
>> On 28/03/10 21:24, whygee wrote:
>>
>>> Jason Thibodeau wrote:
>>>> I'd like to bump this. Any word on how Ic an stop it from optimizing my
>>>> required logic away? Why wouldn't Xilinx just allow me to turn off
>>>> optimization?
>>> ok in fact I have found the following :
>>> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
>>> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
>>> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
>>> http://quartushelp.altera.com/9.1/mergedProjects/hdl/vlog/vlog_file_d...
>>> just use these keywords to search in XST's docs.
>>> _o/
>>> yg
>>
>> Hi Yg - I agree with your proposed solution - however I suggest Jason
>> looks on the Xilinx website for the correct XST incantations :-;
>>
>> regards
>> Alan
>>
>> --
>> Alan Fitc
> This should help:
> http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/cgd.pdf
> keep constraint
> regards Modimo


I should have mentioned that I have tried all the iterations of keep
that I could think of, the gates are still being optimized out. I tried
both placing the keep attribute in the code, and using the xcf file,
neither have worked. I think part of the problem is I don't know hte
exact name of the nets being optimized out, since XST doesn't tell me
this information in the reports.

I'm at a different machine right now, but I'll post up some code
snippets in the morning.

Thanks for the help, all.

--
Jason Thibodeau
From: Matthieu Michon on
On Sun, 28 Mar 2010 21:29:31 -0400
Jason Thibodeau <jason.p.thibodeau(a)gmail.com> wrote:

(...)
>
> I should have mentioned that I have tried all the iterations of keep
> that I could think of, the gates are still being optimized out. I tried
> both placing the keep attribute in the code, and using the xcf file,
> neither have worked. I think part of the problem is I don't know hte
> exact name of the nets being optimized out, since XST doesn't tell me
> this information in the reports.


Altough it is not universal, I use the "S" (save net flag) attribute for keeping signals from being optimized (typically for displaying them in Chipscope).

The "S" attribute is described in the Constraint Guide (cgd.pdf).


--
Matthieu Michon <prenom.nom(a)gmail.com>
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