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From: Joerg on 21 Nov 2009 16:18 Mycelium wrote: > On Sat, 21 Nov 2009 12:59:52 -0800, Joerg <invalid(a)invalid.invalid> > wrote: > >> John Larkin wrote: >>> On Sat, 21 Nov 2009 13:35:01 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >>> >>>> On Sat, 21 Nov 2009 18:59:49 +0000, Raveninghorde >>>> <raveninghorde(a)invalid> wrote: >>>> >>>>> On Fri, 20 Nov 2009 16:22:15 -0800, John Larkin >>>>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>> >>>>>> OK, I just got the first board from production this morning, for this >>>>>> spectroscopy controller thing. >>>>>> >>>>>> ftp://jjlarkin.lmi.net/First.JPG >>>>>> >>>>>> It gets 12 volts in, which runs an LTM8023 switcher brick to make 3.3 >>>>>> volts. The 3.3 runs most of the logic on the board (including a >>>>>> Spartan 6 and a PLX PCIe bridge, both BGAs) and also drives four >>>>>> secondary switchers and some LDOs to make 1.2, 1.5, 1.8, 2.5, and -5 >>>>>> for various uses. >>>>>> >>>>>> So when I powered it up everything went nuts. The PLX chip was >>>>>> obviously fried. After that was pulled, the Xilinx was running hot, >>>>>> and the 3.3 volt supply was bogged down to about 2.6. The LTM >>>>>> regulator was hot. >>>>>> >>>>>> Pulled the Spartan BGA next. >>>>>> >>>>>> Now the 3.3 volt rail wants to run at 5 or so. >>>>>> >>>>>> After much head scratching, I discovered this: >>>>>> >>>>>> ftp://jjlarkin.lmi.net/Swapped.jpg >>>>>> >>>>>> The resistor that's screened "R127" is actually R129. And vice versa. >>>>>> So the switcher was programmed wrong, told to run at an absurdly low >>>>>> frequency and an absurdly high voltage. The ref designators somehow >>>>>> got misplaced during layout. We usually check for this. >>>>>> >>>>>> Apparently our production people, when semi-auto placing dense parts, >>>>>> double-check the ref designator and plop the part into the "correct" >>>>>> place, even if the machine coordinates are a little off. I'll have to >>>>>> warn them to be suspicious about cases like this, especially on first >>>>>> articles. >>>>>> >>>>>> TGIF >>>>>> >>>>>> John >>>>>> >>>>>> >>>>> Experience has taught me to power up new boards on a bench psu by >>>>> winding up the voltage from zero while monitoring the supply rails and >>>>> input current. >>>> With switchers this rarely does anything and often makes things even >>>> worse. >>> Yes. The only thing to do is to isolate the power section from the >>> loads and bring up the supplies unloaded. That requires jumpers or >>> whatever. I do have LC filters between the supply pours and the main >>> pours, and in retrospect I should have removed the inductors and >>> tested the supplies. >>> >>> Given the consequences of power supply failure, I'm leaning more >>> towards always incorporating transzorbs/clamps/crowbars on things like >>> this. >>> >> The only thing that really works with such low voltage levels and >> finicky FPGA is precisely controlled crowbars. Either TL431-style or use >> one of those newfangled comparators in DFN packages that have a >> reference built in. The ones with push-pull outputs ought to be able to >> fire an SCR directly. This also afford the chance to shut down when a >> sequencing rule is being violated. >> >> Another option is to yank the shut-down or slow-start pin. Of course >> that won't help if the root cause is a blown FET in a buck. >> >> Also, there must be something in front of the board that could >> gracefully blow open without causing the sirens to go off. With >> comparators be careful, I just unearthed an undocumented nastiness upon >> power-up in one. Do _not_ trust SPICE models. > > I thought transzorbs were the current norm. Too much lot tolerance, usually. A chip that works nicely at 3.3V might go kaputt at 3.7V so you don't have much wiggle room. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: krw on 21 Nov 2009 16:19 On Sat, 21 Nov 2009 12:59:52 -0800, Joerg <invalid(a)invalid.invalid> wrote: >John Larkin wrote: >> On Sat, 21 Nov 2009 13:35:01 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >> >>> On Sat, 21 Nov 2009 18:59:49 +0000, Raveninghorde >>> <raveninghorde(a)invalid> wrote: >>> >>>> On Fri, 20 Nov 2009 16:22:15 -0800, John Larkin >>>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>> OK, I just got the first board from production this morning, for this >>>>> spectroscopy controller thing. >>>>> >>>>> ftp://jjlarkin.lmi.net/First.JPG >>>>> >>>>> It gets 12 volts in, which runs an LTM8023 switcher brick to make 3.3 >>>>> volts. The 3.3 runs most of the logic on the board (including a >>>>> Spartan 6 and a PLX PCIe bridge, both BGAs) and also drives four >>>>> secondary switchers and some LDOs to make 1.2, 1.5, 1.8, 2.5, and -5 >>>>> for various uses. >>>>> >>>>> So when I powered it up everything went nuts. The PLX chip was >>>>> obviously fried. After that was pulled, the Xilinx was running hot, >>>>> and the 3.3 volt supply was bogged down to about 2.6. The LTM >>>>> regulator was hot. >>>>> >>>>> Pulled the Spartan BGA next. >>>>> >>>>> Now the 3.3 volt rail wants to run at 5 or so. >>>>> >>>>> After much head scratching, I discovered this: >>>>> >>>>> ftp://jjlarkin.lmi.net/Swapped.jpg >>>>> >>>>> The resistor that's screened "R127" is actually R129. And vice versa. >>>>> So the switcher was programmed wrong, told to run at an absurdly low >>>>> frequency and an absurdly high voltage. The ref designators somehow >>>>> got misplaced during layout. We usually check for this. >>>>> >>>>> Apparently our production people, when semi-auto placing dense parts, >>>>> double-check the ref designator and plop the part into the "correct" >>>>> place, even if the machine coordinates are a little off. I'll have to >>>>> warn them to be suspicious about cases like this, especially on first >>>>> articles. >>>>> >>>>> TGIF >>>>> >>>>> John >>>>> >>>>> >>>> Experience has taught me to power up new boards on a bench psu by >>>> winding up the voltage from zero while monitoring the supply rails and >>>> input current. >>> With switchers this rarely does anything and often makes things even >>> worse. >> >> Yes. The only thing to do is to isolate the power section from the >> loads and bring up the supplies unloaded. That requires jumpers or >> whatever. I do have LC filters between the supply pours and the main >> pours, and in retrospect I should have removed the inductors and >> tested the supplies. >> >> Given the consequences of power supply failure, I'm leaning more >> towards always incorporating transzorbs/clamps/crowbars on things like >> this. >> > >The only thing that really works with such low voltage levels and >finicky FPGA is precisely controlled crowbars. Either TL431-style or use Use an FPGA that's not so finicky. They're all better than they were but some have no sequencing requirements at all. >one of those newfangled comparators in DFN packages that have a >reference built in. The ones with push-pull outputs ought to be able to >fire an SCR directly. This also afford the chance to shut down when a >sequencing rule is being violated. Comparitors with references are expensive. I'm surprised that you even know they exist. ;-) With money to burn, the ones with the variable hysterias input switch are pretty nice too (ADCMP343, etc.). >Another option is to yank the shut-down or slow-start pin. Of course >that won't help if the root cause is a blown FET in a buck. If you want belt and suspenders, what about a pass FET on the input? >Also, there must be something in front of the board that could >gracefully blow open without causing the sirens to go off. With >comparators be careful, I just unearthed an undocumented nastiness upon >power-up in one. Do _not_ trust SPICE models. Usually, the normal board variance is more than one that of one device failing. Fuses, PTCs, and the like are pretty poor at this. Unless a model specifically addresses an operational mode, assume it doesn't. If it says it does, be very skeptical. Manufactrurer's public models are pretty damned lousy.
From: Joerg on 21 Nov 2009 16:30 krw wrote: > On Sat, 21 Nov 2009 12:59:52 -0800, Joerg <invalid(a)invalid.invalid> > wrote: > >> John Larkin wrote: [...] >>> Given the consequences of power supply failure, I'm leaning more >>> towards always incorporating transzorbs/clamps/crowbars on things like >>> this. >>> >> The only thing that really works with such low voltage levels and >> finicky FPGA is precisely controlled crowbars. Either TL431-style or use > > Use an FPGA that's not so finicky. They're all better than they were > but some have no sequencing requirements at all. > >> one of those newfangled comparators in DFN packages that have a >> reference built in. The ones with push-pull outputs ought to be able to >> fire an SCR directly. This also afford the chance to shut down when a >> sequencing rule is being violated. > > Comparitors with references are expensive. I'm surprised that you > even know they exist. ;-) ... Well, on a recent design I had to. Dozens of components that all had to fit into the space of a postage stamp. It was one of the few projects where the BOM budget was huge, at least from my usual perspective. I still ended up under 50% of it :-) > ... With money to burn, the ones with the > variable hysterias input switch are pretty nice too (ADCMP343, etc.). > >> Another option is to yank the shut-down or slow-start pin. Of course >> that won't help if the root cause is a blown FET in a buck. > > If you want belt and suspenders, what about a pass FET on the input? > That could also fail. I prefer sacrificial parts for this such as fuses or fuse-resistors. >> Also, there must be something in front of the board that could >> gracefully blow open without causing the sirens to go off. With >> comparators be careful, I just unearthed an undocumented nastiness upon >> power-up in one. Do _not_ trust SPICE models. > > Usually, the normal board variance is more than one that of one device > failing. Fuses, PTCs, and the like are pretty poor at this. > Fuses are excellent. SCR shunts the rail, holds it there for a brief moment ... phut ... fuse lets go. > Unless a model specifically addresses an operational mode, assume it > doesn't. If it says it does, be very skeptical. Manufactrurer's > public models are pretty damned lousy. This one has a problem that the reference shoot up to the VCC rail and then slowly comes back. IOW it isn't very suitable for power-up protection or sequencing. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: John Larkin on 21 Nov 2009 16:47 On Sat, 21 Nov 2009 13:18:08 -0800, Joerg <invalid(a)invalid.invalid> wrote: >Mycelium wrote: >> On Sat, 21 Nov 2009 12:59:52 -0800, Joerg <invalid(a)invalid.invalid> >> wrote: >> >>> John Larkin wrote: >>>> On Sat, 21 Nov 2009 13:35:01 -0600, krw <krw(a)att.bizzzzzzzzzzz> wrote: >>>> >>>>> On Sat, 21 Nov 2009 18:59:49 +0000, Raveninghorde >>>>> <raveninghorde(a)invalid> wrote: >>>>> >>>>>> On Fri, 20 Nov 2009 16:22:15 -0800, John Larkin >>>>>> <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>>>> >>>>>>> OK, I just got the first board from production this morning, for this >>>>>>> spectroscopy controller thing. >>>>>>> >>>>>>> ftp://jjlarkin.lmi.net/First.JPG >>>>>>> >>>>>>> It gets 12 volts in, which runs an LTM8023 switcher brick to make 3.3 >>>>>>> volts. The 3.3 runs most of the logic on the board (including a >>>>>>> Spartan 6 and a PLX PCIe bridge, both BGAs) and also drives four >>>>>>> secondary switchers and some LDOs to make 1.2, 1.5, 1.8, 2.5, and -5 >>>>>>> for various uses. >>>>>>> >>>>>>> So when I powered it up everything went nuts. The PLX chip was >>>>>>> obviously fried. After that was pulled, the Xilinx was running hot, >>>>>>> and the 3.3 volt supply was bogged down to about 2.6. The LTM >>>>>>> regulator was hot. >>>>>>> >>>>>>> Pulled the Spartan BGA next. >>>>>>> >>>>>>> Now the 3.3 volt rail wants to run at 5 or so. >>>>>>> >>>>>>> After much head scratching, I discovered this: >>>>>>> >>>>>>> ftp://jjlarkin.lmi.net/Swapped.jpg >>>>>>> >>>>>>> The resistor that's screened "R127" is actually R129. And vice versa. >>>>>>> So the switcher was programmed wrong, told to run at an absurdly low >>>>>>> frequency and an absurdly high voltage. The ref designators somehow >>>>>>> got misplaced during layout. We usually check for this. >>>>>>> >>>>>>> Apparently our production people, when semi-auto placing dense parts, >>>>>>> double-check the ref designator and plop the part into the "correct" >>>>>>> place, even if the machine coordinates are a little off. I'll have to >>>>>>> warn them to be suspicious about cases like this, especially on first >>>>>>> articles. >>>>>>> >>>>>>> TGIF >>>>>>> >>>>>>> John >>>>>>> >>>>>>> >>>>>> Experience has taught me to power up new boards on a bench psu by >>>>>> winding up the voltage from zero while monitoring the supply rails and >>>>>> input current. >>>>> With switchers this rarely does anything and often makes things even >>>>> worse. >>>> Yes. The only thing to do is to isolate the power section from the >>>> loads and bring up the supplies unloaded. That requires jumpers or >>>> whatever. I do have LC filters between the supply pours and the main >>>> pours, and in retrospect I should have removed the inductors and >>>> tested the supplies. >>>> >>>> Given the consequences of power supply failure, I'm leaning more >>>> towards always incorporating transzorbs/clamps/crowbars on things like >>>> this. >>>> >>> The only thing that really works with such low voltage levels and >>> finicky FPGA is precisely controlled crowbars. Either TL431-style or use >>> one of those newfangled comparators in DFN packages that have a >>> reference built in. The ones with push-pull outputs ought to be able to >>> fire an SCR directly. This also afford the chance to shut down when a >>> sequencing rule is being violated. >>> >>> Another option is to yank the shut-down or slow-start pin. Of course >>> that won't help if the root cause is a blown FET in a buck. >>> >>> Also, there must be something in front of the board that could >>> gracefully blow open without causing the sirens to go off. With >>> comparators be careful, I just unearthed an undocumented nastiness upon >>> power-up in one. Do _not_ trust SPICE models. >> >> I thought transzorbs were the current norm. > > >Too much lot tolerance, usually. A chip that works nicely at 3.3V might >go kaputt at 3.7V so you don't have much wiggle room. You can buy a 3.3 volt transzorb. It will sink lots of current at about 6 volts. http://www.vishay.com/doc?88940 John
From: krw on 21 Nov 2009 16:51
On Sat, 21 Nov 2009 13:30:00 -0800, Joerg <invalid(a)invalid.invalid> wrote: >krw wrote: >> On Sat, 21 Nov 2009 12:59:52 -0800, Joerg <invalid(a)invalid.invalid> >> wrote: >> >>> John Larkin wrote: > >[...] > >>>> Given the consequences of power supply failure, I'm leaning more >>>> towards always incorporating transzorbs/clamps/crowbars on things like >>>> this. >>>> >>> The only thing that really works with such low voltage levels and >>> finicky FPGA is precisely controlled crowbars. Either TL431-style or use >> >> Use an FPGA that's not so finicky. They're all better than they were >> but some have no sequencing requirements at all. >> >>> one of those newfangled comparators in DFN packages that have a >>> reference built in. The ones with push-pull outputs ought to be able to >>> fire an SCR directly. This also afford the chance to shut down when a >>> sequencing rule is being violated. >> >> Comparitors with references are expensive. I'm surprised that you >> even know they exist. ;-) ... > > >Well, on a recent design I had to. Dozens of components that all had to >fit into the space of a postage stamp. It was one of the few projects >where the BOM budget was huge, at least from my usual perspective. I >still ended up under 50% of it :-) They're too expensive as "protection devices" even for me. >> ... With money to burn, the ones with the >> variable hysterias input switch are pretty nice too (ADCMP343, etc.). >> >>> Another option is to yank the shut-down or slow-start pin. Of course >>> that won't help if the root cause is a blown FET in a buck. >> >> If you want belt and suspenders, what about a pass FET on the input? >> > >That could also fail. I prefer sacrificial parts for this such as fuses >or fuse-resistors. ANything can fail. How many belts do you wear with your suspenders? Fuses are ugly. Customers with blown fuses even more so. THe owner got a ration a few weeks back because we made the television (official time out for equipment failure). ...and it wasn't even our fuse. They had the crate closed up so didn't hear the UPS bitching either. >>> Also, there must be something in front of the board that could >>> gracefully blow open without causing the sirens to go off. With >>> comparators be careful, I just unearthed an undocumented nastiness upon >>> power-up in one. Do _not_ trust SPICE models. >> >> Usually, the normal board variance is more than one that of one device >> failing. Fuses, PTCs, and the like are pretty poor at this. >> > >Fuses are excellent. SCR shunts the rail, holds it there for a brief >moment ... phut ... fuse lets go. Fuses have very poor tolerances. A 2A fuse my let something go phut at 5A. The electronics is there to protect the fuse. >> Unless a model specifically addresses an operational mode, assume it >> doesn't. If it says it does, be very skeptical. Manufactrurer's >> public models are pretty damned lousy. > > >This one has a problem that the reference shoot up to the VCC rail and >then slowly comes back. IOW it isn't very suitable for power-up >protection or sequencing. Just sequence its power! |