From: Ron Johnson on 15 Jun 2010 11:30 On 06/15/2010 04:34 AM, Stan Hoeppner wrote: [snip] > > Disclaimer: my comments below intentionally exclude x86-64 capable CPUs > > > There are different kernels for different models of the Intel x86 processor > family and compatibles, but make no mistake, they all use the same instruction > set introduced in the 80386. There is no i686 instruction set, nor an i586 or > i486 instruction set. This is just *wrong*. http://en.wikipedia.org/wiki/X86_instruction_listings#Added_with_80486 http://en.wikipedia.org/wiki/X86_instruction_listings#Added_with_Pentium_Pro You may think that's not a lot, but it is to a compiler writer, and it demonstrates that Stan's wrong. > As a matter of fact, the latter of these aren't even > models of Intel CPUs. You're right, just as I'm not "The Johnsons". That's a *family* designation. > What kernel programmers call i586 and i686 are actually > classes or sets of features of Intel and compatible competitor CPUs from > Cyrix, IBM, TI, and AMD. The original Intel 60/66 MHz Pentium model number is > actually 80501. All Pentiums up to the MMX models were numbered 80502. The > i686 kernel label describes the Pentium Pro, whose model number is 80521, and > all other later 32 bit x86 CPUs to follow it. Manufacturing codes? So what? [big snip of partly correct, partly nonsense] -- "There is usually only a limited amount of damage that can be done by dull or stupid people. For creating a truly monumental disaster, you need people with high IQs." Thomas Sowell -- To UNSUBSCRIBE, email to debian-user-REQUEST(a)lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmaster(a)lists.debian.org Archive: http://lists.debian.org/4C179A7C.5060004(a)cox.net
From: Boyd Stephen Smith Jr. on 15 Jun 2010 11:30 On Tuesday 15 June 2010 04:34:23 Stan Hoeppner wrote: > Again, the differences in the various 32bit kernels have nothing to do with > the instruction sets being different. They are identical. Incorrect. The i486 lines of chip (486 architecture in gcc) supports CMPXCHG and 5 other instructions which result in illegal instruction exceptions on a 80386. CMPXCHG is used for fast locking in modern kernel + glibc/eglibc. That's why there is no -386 kernel image available. The Pentium lines (586 architecture in gcc) support another 6 additional instructions, and one of those was actually included in i486 processors that were designed after the Pentium line: CPUID. Again, on 80386 and most i486 processors, these will cause an illegal instruction exception. System mangement mode was introduced here as well. The Pentium Pro line (686 architecture in gcc) gave us conditional move instructions. Attempted execution of these instructions on 386, 486, or 586 processors will, again, cause an illegal instruction exception. Details: http://en.wikipedia.org/wiki/X86_instruction_listings In addition to the upgrades to the instruction set, the micro-architecture changed a number of times between the original 80386 and the most recent IA-32 only chips from Intel. Of course, other manufacturers of IA-32 chips had different micro-architectures. GCC has two separate options that reflect these parallel changes: -march=<cpu-type> will generate code that uses instructions supported by $cpu- type, but not necessarily by the original 80386. -mtune=<cpu-type> will generate code that runs "best" on the micro- architecture of $cpu-type, but still uses only instuctions that are shared across the whole IA-32 family. Those two options can of course be combined to produce (e.g.) a kernel that runs on anything Pentium or better, but runs best on the Nocona micro- architecture. -- Boyd Stephen Smith Jr. ,= ,-_-. =. bss(a)iguanasuicide.net ((_/)o o(\_)) ICQ: 514984 YM/AIM: DaTwinkDaddy `-'(. .)`-' http://iguanasuicide.net/ \_/
From: Boyd Stephen Smith Jr. on 15 Jun 2010 11:40 On Tuesday 15 June 2010 10:21:06 Paul E Condon wrote: > But for these packages, if the > instruction set for the two classes of chip are the same, what is it that > is different from the point of view of the kernel software requirements? The micro-architecture. Basically, how the instruction set is implemented in transistor layouts inside the IC. Instruction ordering is part of it. (Also, the instruction set used by -686 packages is actually larger than the instruction set used by -484 packages.) -- Boyd Stephen Smith Jr. ,= ,-_-. =. bss(a)iguanasuicide.net ((_/)o o(\_)) ICQ: 514984 YM/AIM: DaTwinkDaddy `-'(. .)`-' http://iguanasuicide.net/ \_/
From: Stan Hoeppner on 16 Jun 2010 06:30 Ron Johnson put forth on 6/15/2010 10:21 AM: > On 06/15/2010 04:34 AM, Stan Hoeppner wrote: > [snip] >> >> Disclaimer: my comments below intentionally exclude x86-64 capable CPUs >> >> >> There are different kernels for different models of the Intel x86 >> processor >> family and compatibles, but make no mistake, they all use the same >> instruction >> set introduced in the 80386. There is no i686 instruction set, nor an >> i586 or >> i486 instruction set. > > This is just *wrong*. No, it's not "just wrong". If you read the Intel literature, there is a single IA32 instruction set. Some processor models have additional model specific instructions because they introduce new registers, but the instruction set, or IA32 ISA, is the same across the board. I clearly explained later in my post that some models have model specific extensions. > http://en.wikipedia.org/wiki/X86_instruction_listings#Added_with_80486 > > http://en.wikipedia.org/wiki/X86_instruction_listings#Added_with_Pentium_Pro > > > You may think that's not a lot, but it is to a compiler writer, and it > demonstrates that Stan's wrong. Is this about answering the OP's question or proving me wrong? You said that twice now, and that duck doesn't hunt. I've stated nothing factually incorrect. That said, I'm not the maintainer of the i486, i586, and i686 kernels, so I can't say with certainty exactly what is included in each kernel or what gcc flags were used when built. However, specifically in the case of the i486 kernel, I find it hard to believe a kernel would be rebuilt due to 6 new instructions, 3 of which simply flush the L1 cache in one fashion or another. I could be wrong, though it seems like wasted effort given the small gain. In the case of the Pentium Pro, Intel simply added a conditional for each move instruction. Again, I don't know if using these instructions would yield much if any performance gain for kernel code. Again, I believe the differences in these kernels have more to do with subroutines that address specific features of each platform than with what instructions were exposed to gcc at compile time. The largest difference is the BIOS for each of these CPU generations, and different BIOSes are going to require different kernel code. In the case of the Pentium Pro (and later) there is code to manage the L2 cache, although you don't see anything related to L2 cache instructions on the Wikipedia pages. I'd say the data there is incomplete. I'll have to research it. Also, AFAIK, the i686 kernels run on the Cyrix 6x86, which, IIRC, doesn't support the conditional move instructions of the Intel PPro... >> As a matter of fact, the latter of these aren't >> even >> models of Intel CPUs. > > You're right, just as I'm not "The Johnsons". That's a *family* > designation. Now that's just plain wrong. There is no "i586" or "i686" family. People other than Intel came up with these descriptions. Intel specifically made a point that there is no 586 and no 686. They did this because copyright became an issue when they tried to silence their competition in court. The judges said you can't copyright a number. Thus Intel invented "Pentium" and copyrighted it so competitors making compatible chips couldn't piggy back. >> What kernel programmers call i586 and i686 are >> actually >> classes or sets of features of Intel and compatible competitor CPUs from >> Cyrix, IBM, TI, and AMD. The original Intel 60/66 MHz Pentium model >> number is >> actually 80501. All Pentiums up to the MMX models were numbered >> 80502. The >> i686 kernel label describes the Pentium Pro, whose model number is >> 80521, and >> all other later 32 bit x86 CPUs to follow it. > > Manufacturing codes? So what? These aren't manufacturing codes, these are model numbers. Everyone calls a "386" a "386" because the chip model number is 80386. Same for all Intel chips before it, and the 80486 or "486" after it. The Pentium is actually Intel model 80501. Again, Intel specifically did this to get away from "model numbers as product names". My whole point here was that Intel never described their Pentium or Pentium Pro with any kind of "family" model number designation as had previously been done. They intentionally changed course. Everyone else, however, applied their own labels, and continued naming Intel's chips in succession, even though Intel didn't. > [big snip of partly correct, partly nonsense] Thanks for the civil critique Ron. Now, go talk to the devs and find out exactly what the differences are between the kernels in question, and then you can elaborate on my degree of nonsense. :) -- Stan -- To UNSUBSCRIBE, email to debian-user-REQUEST(a)lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmaster(a)lists.debian.org Archive: http://lists.debian.org/4C18A619.1040502(a)hardwarefreak.com
From: Andrei Popescu on 19 Jun 2010 13:20 On Vi, 11 iun 10, 11:09:18, Aaron Toponce wrote: > Other than the kernel, which is compiled for 686 instruction sets, and > maybe a few core packages that would benefit from targeting the 686 > architecture, Debian compiles the rest of the packages against 386. AFAIR support for 386 was dropped a while ago and all packages are now compiled for 486. There was even some announcement, but can't find it now... Regards, Andrei -- Offtopic discussions among Debian users and developers: http://lists.alioth.debian.org/mailman/listinfo/d-community-offtopic
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