simulating a digital control loop
in [Design]
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From: Jim Thompson on 18 Apr 2010 15:29 On Sun, 18 Apr 2010 12:19:31 -0700, Tim Wescott <tim(a)seemywebsite.now> wrote: >Peter Way wrote: >> You can simulate the analog, digital, or hybrid control loops with >> SimApp www.simapp.com >> >> These can be done in a simple block diagram form. > >But can you drop a circuit into it, and simulate that in a "spice-like" >way while simulating the rest in a more abstract way? > >It's what John's looking for, and I know it's something that I'd find >pretty darned useful. A little over a year ago I made up a behavioral 10-bit DAC, so I could quickly self-check a 10-bit SAR-based (device-level) ADC in simulation. I know, in developing the ADC, that I used the behavioral DAC along with CMOS-level stuff to develop the SAR timing. So I'd guess it's be easy enough to make a fully behavioral SAR-based ADC. What kind of behavioral ADC's would you like to see? I like a modeling challenge... that's how I keep myself amused (besides lurking here) while long term simulations are churning. (A behavioral sample-and-hold is trivial ;-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The only thing bipartisan in this country is hypocrisy
From: JosephKK on 21 Apr 2010 01:31 On Sun, 18 Apr 2010 12:29:33 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: >On Sun, 18 Apr 2010 12:19:31 -0700, Tim Wescott <tim(a)seemywebsite.now> >wrote: > >>Peter Way wrote: >>> You can simulate the analog, digital, or hybrid control loops with >>> SimApp www.simapp.com >>> >>> These can be done in a simple block diagram form. >> >>But can you drop a circuit into it, and simulate that in a "spice-like" >>way while simulating the rest in a more abstract way? >> >>It's what John's looking for, and I know it's something that I'd find >>pretty darned useful. > >A little over a year ago I made up a behavioral 10-bit DAC, so I could >quickly self-check a 10-bit SAR-based (device-level) ADC in >simulation. > >I know, in developing the ADC, that I used the behavioral DAC along >with CMOS-level stuff to develop the SAR timing. > >So I'd guess it's be easy enough to make a fully behavioral SAR-based >ADC. > >What kind of behavioral ADC's would you like to see? > >I like a modeling challenge... that's how I keep myself amused >(besides lurking here) while long term simulations are churning. > >(A behavioral sample-and-hold is trivial ;-) > > ...Jim Thompson Since you asked: A. 12 bit ADC made with 2 ea 8 bit flash ADC in a coarse-fine conversion, 250 MSPS B. Two slope and 4 slope integrating converters 20-bits or more, as fast as it can go. C. A 14-bit or more SAR ADC >10MSPS D. A 12-bit 50 MSPS CVSD ADC And realizing any of these in the real world could pay off handsomely.
From: John Larkin on 21 Apr 2010 10:03 On Tue, 20 Apr 2010 22:31:38 -0700, "JosephKK"<quiettechblue(a)yahoo.com> wrote: >On Sun, 18 Apr 2010 12:29:33 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: > >>On Sun, 18 Apr 2010 12:19:31 -0700, Tim Wescott <tim(a)seemywebsite.now> >>wrote: >> >>>Peter Way wrote: >>>> You can simulate the analog, digital, or hybrid control loops with >>>> SimApp www.simapp.com >>>> >>>> These can be done in a simple block diagram form. >>> >>>But can you drop a circuit into it, and simulate that in a "spice-like" >>>way while simulating the rest in a more abstract way? >>> >>>It's what John's looking for, and I know it's something that I'd find >>>pretty darned useful. >> >>A little over a year ago I made up a behavioral 10-bit DAC, so I could >>quickly self-check a 10-bit SAR-based (device-level) ADC in >>simulation. >> >>I know, in developing the ADC, that I used the behavioral DAC along >>with CMOS-level stuff to develop the SAR timing. >> >>So I'd guess it's be easy enough to make a fully behavioral SAR-based >>ADC. >> >>What kind of behavioral ADC's would you like to see? >> >>I like a modeling challenge... that's how I keep myself amused >>(besides lurking here) while long term simulations are churning. >> >>(A behavioral sample-and-hold is trivial ;-) >> >> ...Jim Thompson > >Since you asked: > >A. 12 bit ADC made with 2 ea 8 bit flash ADC in a coarse-fine conversion, >250 MSPS >B. Two slope and 4 slope integrating converters 20-bits or more, as fast >as it can go. >C. A 14-bit or more SAR ADC >10MSPS >D. A 12-bit 50 MSPS CVSD ADC > >And realizing any of these in the real world could pay off handsomely. Most of those performance points are already available as standard ICs. But the faster ICs are mostly pipeline designs, and the big-bits boys are delta-sigma. SARs are currently peaking out around 2 MHz. John
From: Jim Thompson on 21 Apr 2010 16:52 On Tue, 20 Apr 2010 22:31:38 -0700, "JosephKK"<quiettechblue(a)yahoo.com> wrote: >On Sun, 18 Apr 2010 12:29:33 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: > >>On Sun, 18 Apr 2010 12:19:31 -0700, Tim Wescott <tim(a)seemywebsite.now> >>wrote: >> >>>Peter Way wrote: >>>> You can simulate the analog, digital, or hybrid control loops with >>>> SimApp www.simapp.com >>>> >>>> These can be done in a simple block diagram form. >>> >>>But can you drop a circuit into it, and simulate that in a "spice-like" >>>way while simulating the rest in a more abstract way? >>> >>>It's what John's looking for, and I know it's something that I'd find >>>pretty darned useful. >> >>A little over a year ago I made up a behavioral 10-bit DAC, so I could >>quickly self-check a 10-bit SAR-based (device-level) ADC in >>simulation. >> >>I know, in developing the ADC, that I used the behavioral DAC along >>with CMOS-level stuff to develop the SAR timing. >> >>So I'd guess it's be easy enough to make a fully behavioral SAR-based >>ADC. >> >>What kind of behavioral ADC's would you like to see? >> >>I like a modeling challenge... that's how I keep myself amused >>(besides lurking here) while long term simulations are churning. >> >>(A behavioral sample-and-hold is trivial ;-) >> >> ...Jim Thompson > >Since you asked: > >A. 12 bit ADC made with 2 ea 8 bit flash ADC in a coarse-fine conversion, >250 MSPS >B. Two slope and 4 slope integrating converters 20-bits or more, as fast >as it can go. >C. A 14-bit or more SAR ADC >10MSPS >D. A 12-bit 50 MSPS CVSD ADC > >And realizing any of these in the real world could pay off handsomely. Behavioral has no speed limit, unless you build it in. And it's _always_ monotonic :-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The only thing bipartisan in this country is hypocrisy
From: JosephKK on 21 Apr 2010 22:07
On Wed, 21 Apr 2010 13:52:04 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: >On Tue, 20 Apr 2010 22:31:38 -0700, >"JosephKK"<quiettechblue(a)yahoo.com> wrote: > >>On Sun, 18 Apr 2010 12:29:33 -0700, Jim Thompson >><To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: >> >>>On Sun, 18 Apr 2010 12:19:31 -0700, Tim Wescott <tim(a)seemywebsite.now> >>>wrote: >>> >>>>Peter Way wrote: >>>>> You can simulate the analog, digital, or hybrid control loops with >>>>> SimApp www.simapp.com >>>>> >>>>> These can be done in a simple block diagram form. >>>> >>>>But can you drop a circuit into it, and simulate that in a "spice-like" >>>>way while simulating the rest in a more abstract way? >>>> >>>>It's what John's looking for, and I know it's something that I'd find >>>>pretty darned useful. >>> >>>A little over a year ago I made up a behavioral 10-bit DAC, so I could >>>quickly self-check a 10-bit SAR-based (device-level) ADC in >>>simulation. >>> >>>I know, in developing the ADC, that I used the behavioral DAC along >>>with CMOS-level stuff to develop the SAR timing. >>> >>>So I'd guess it's be easy enough to make a fully behavioral SAR-based >>>ADC. >>> >>>What kind of behavioral ADC's would you like to see? >>> >>>I like a modeling challenge... that's how I keep myself amused >>>(besides lurking here) while long term simulations are churning. >>> >>>(A behavioral sample-and-hold is trivial ;-) >>> >>> ...Jim Thompson >> >>Since you asked: >> >>A. 12 bit ADC made with 2 ea 8 bit flash ADC in a coarse-fine conversion, >>250 MSPS >>B. Two slope and 4 slope integrating converters 20-bits or more, as fast >>as it can go. >>C. A 14-bit or more SAR ADC >10MSPS >>D. A 12-bit 50 MSPS CVSD ADC >> >>And realizing any of these in the real world could pay off handsomely. > >Behavioral has no speed limit, unless you build it in. And it's >_always_ monotonic :-) > > ...Jim Thompson I expect to learn quite a bit by studying the models as it is. Especially if provided with a "test jig" circuit that shows how to use model. |