From: Dinalight .com on
On 4 dic, 15:15, "kendor" <jonas.re...(a)bfh.ch> wrote:
> hello there
>
> for a measuring utility (running @ 100MHZ) I need a counter of 42-bit width
> whose value is used by several sub blocks of my design. As a first, somehow
> dirty solution I have implemented this like follows. Since this approach
> needs quite a huge amount of FFs and leads to long delaytimes (bit 0 to 42)
> I am looking for an alternative. I was thinking about usingBlockRAM
> (Spartan3) to reduce routing effort and delaytimes. (see alsohttp://courses.ece.illinois.edu/ece412/References/datasheets/xapp463.pdf)
>
> Has anyone ever done such a thing or do you have any suggestions on solving
> my task?
>
> current code:
> -------------------------------------
> # i have to use std_logic_unsigned since numeric_std has as integer width
> the normal 4 bytes width (32bit - which for 42 bits is not enough ...
> overflow,..)
>
> # ...
> GENERIC (
>   t : NATURAL := 42;  --! counter width
>   wd: NATURAL := 5    --! divider (clk/(2*wd))
> );
>
> # ...
> ARCHITECTURE rtl OF worldtimeCtr IS
>         SIGNAL cnt: std_logic_vector(t-1 downto 0);
> BEGIN
>         PROCESS(clk,rst)
>                 VARIABLE temp : NATURAL RANGE 0 to wd;
>         BEGIN
>                 IF(rst='0')THEN
>                         cnt <= (others =>'0');
>                         temp := 0;
>                 ELSIF(clk'event and clk='1')THEN
>                         IF(en='1' and temp = wd)THEN
>                            temp := 0;
>                            cnt <= STD_LOGIC_VECTOR(cnt + 1);
>                         END IF;
>                         temp := temp+1;
>                 END if;
>
>         END process;
>         o_worldtime <= cnt;
> END rtl;
>
> # ...
> -------------------------------------
>
> thank you in advance
>
> kendor

Cant you use a DCM to generate a sub-clock?