16-bit SPI trying to read from 22-clock cycle ADC
in [Embedded]
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From: lowcost on 14 Sep 2009 17:36 Ulf Samuelsson ha scritto: > An idea: > > Run a timer which is connected to the SSC input clock and ADC clock. > It also clocks another timer in PWM mode generating > the ADC chip select. > > The ADC will see 22 active and 10 passive bits > and the SSC will see 32 bits. 2รง: using spi_out (mosi) for CS/SHDN and trasmitting the right pattern, coded n times in flash table, while receving Dout on miso. a small RC delay on mosi will insure that CS fall after DCLOCK low, according with tCSD. a small RC delay on miso will insure that valid Dout will be sampled on DCLOCK falling, according with thDO. all this running under DMA_PDC , sampling n samples block in n lenght ram buffer. regards -- lowcost |