An other Microchip screwup on teh 18F14K22
in [Design]
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From: langwadt on 8 May 2010 08:42 On 8 Maj, 00:57, "k...(a)att.bizzzzzzzzzzzz" <k...(a)att.bizzzzzzzzzzzz> wrote: > On Fri, 07 May 2010 14:16:26 -0400, Spehro Pefhany > > > > <speffS...(a)interlogDOTyou.knowwhat> wrote: > >On Fri, 07 May 2010 09:27:35 -0700, John Larkin > ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: > > >>That's pretty bad. But uPs are getting so complex, so overloaded with > >>features, that the designers are sort of shoveling hunks of home-made > >>or purchased IP into compilers and hoping for the best. And, > >>apparently, not taking much time to simulate and verify. Or document! > >>We had to do a bunch of experiments on the SPI interface on our NXP > >>ARMs; even high-level support people couldn't answer some fundamental > >>timing/framing questions. The SPI and ADC documentation is awful. > > >>We use ARM chips that have 30-character pin names, the pin functions > >>are so overloaded. > > >Who's are you using now? We're getting going with the Luminary parts. > > >>What would be nice would be if things like SPI were small RAM-driven > >>microengines. Then the functionality would be in loadable code, not > >>hard-wired silicon. Sort of like Motorola's TPU blocks. They could be > >>repurposed, too. > > >>John > > >You'd think it would be relatively simple to put a thin FPGA or CPLD > >fabric around the core, perhaps preloaded from ROM with some useful > >defaults. > > That's a lot easier said than done. First, X, A, and A have most of the IP > locked up for FPGA sorts of things. Second, the development software for such > things is non-trivial. Great idea, but not likely to fly. yep, programmable logic takes space, is not easy to design, and the software is not easy to get right, some might say that the big 2(3) are still trying :) -Lasse
From: nospam on 8 May 2010 10:26 Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: >On a sunny day (Fri, 07 May 2010 21:37:22 +0100) it happened nospam ><nospam(a)please.invalid> wrote in <8kt8u55a21v709856fi48o570np4dns79r(a)4ax.com>: > >>Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: >> >>>Do they not want people to use their chips? >> >>It is a relatively new chip, the issues you are complaining about have been >>documented in freely available errata for about a year (the errata is even >>linked from digikey product pages). >> >>The A8 silicon revision is supposed to have fixed these issues. >> >>A reasonable complaint would be about difficulty knowing what silicon >>revision you can buy. > >Do you not think it is strange that it took 8 revisions for it to work (IF it works in A8)? The datasheet was issued in Feb 2009 and is still marked preliminary. It is a new part. I think they didn't make and ship a new silicon revision every 2 months since then. >When I bought the Z80, in the 19 eighties, a chip that has a much >more complicated instruction set, but much easier to use, it worked on all advertised issues. A Z80 system with the features of the PIC18F14K22 would have taken a square foot of PCB stuffed full of chips, take 100 times more power to run at less than 1/4 the speed. Silly comparison.
From: krw on 8 May 2010 10:29 On Sat, 8 May 2010 05:42:14 -0700 (PDT), "langwadt(a)fonz.dk" <langwadt(a)fonz.dk> wrote: >On 8 Maj, 00:57, "k...(a)att.bizzzzzzzzzzzz" <k...(a)att.bizzzzzzzzzzzz> >wrote: >> On Fri, 07 May 2010 14:16:26 -0400, Spehro Pefhany >> >> >> >> <speffS...(a)interlogDOTyou.knowwhat> wrote: >> >On Fri, 07 May 2010 09:27:35 -0700, John Larkin >> ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >> >> >>That's pretty bad. But uPs are getting so complex, so overloaded with >> >>features, that the designers are sort of shoveling hunks of home-made >> >>or purchased IP into compilers and hoping for the best. And, >> >>apparently, not taking much time to simulate and verify. Or document! >> >>We had to do a bunch of experiments on the SPI interface on our NXP >> >>ARMs; even high-level support people couldn't answer some fundamental >> >>timing/framing questions. The SPI and ADC documentation is awful. >> >> >>We use ARM chips that have 30-character pin names, the pin functions >> >>are so overloaded. >> >> >Who's are you using now? We're getting going with the Luminary parts. >> >> >>What would be nice would be if things like SPI were small RAM-driven >> >>microengines. Then the functionality would be in loadable code, not >> >>hard-wired silicon. Sort of like Motorola's TPU blocks. They could be >> >>repurposed, too. >> >> >>John >> >> >You'd think it would be relatively simple to put a thin FPGA or CPLD >> >fabric around the core, perhaps preloaded from ROM with some useful >> >defaults. >> >> That's a lot easier said than done. �First, X, A, and A have most of the IP >> locked up for FPGA sorts of things. �Second, the development software for such >> things is non-trivial. �Great idea, but not likely to fly. > >yep, programmable logic takes space, is not easy to design, and the >software is >not easy to get right, some might say that the big 2(3) are still >trying :) Considering that the alternative is far more difficult *and* expensive... Nothing worthwhile is easy.
From: krw on 8 May 2010 10:34 On Sat, 08 May 2010 11:43:10 GMT, Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: >On a sunny day (Fri, 07 May 2010 21:37:22 +0100) it happened nospam ><nospam(a)please.invalid> wrote in <8kt8u55a21v709856fi48o570np4dns79r(a)4ax.com>: > >>Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: >> >>>Do they not want people to use their chips? >> >>It is a relatively new chip, the issues you are complaining about have been >>documented in freely available errata for about a year (the errata is even >>linked from digikey product pages). >> >>The A8 silicon revision is supposed to have fixed these issues. >> >>A reasonable complaint would be about difficulty knowing what silicon >>revision you can buy. > >Do you not think it is strange that it took 8 revisions for it to work (IF it works in A8)? >In my view Microflip should focus a bit more on quality and not so much >on putting out yet an other 'market segmented' version of the same thing. >What does a new mask cost these days? Must be very expensive, especially >if after 7 silicon versions with the same problem not a single customer will buy these chips. >No return on investment. Why do you think they focus on "an other 'market segment'"? Masks (and more so the people that go with it) are expensive. >When I bought the Z80, in the 19 eighties, a chip that has a much >more complicated instruction set, but much easier to use, it worked on all advertised issues. It might be a "more complicated" instruction set but you're not having trouble with the "instruction set", now are you? >Indeed hardware like this is becoming like Microsoft software, >to actually use it you need the next service pack, and that then breaks some things usually. >If John L gets his way, and we get RAM (say FPGA) on chip to for the microcode, >then next thing is 'live updates' for your embedded system. >I am out of here :-) If your widgets are as perfect as you claim, why would they need updates? You do test them, right? You never add features to your products?
From: Jan Panteltje on 8 May 2010 11:00
On a sunny day (Sat, 08 May 2010 15:26:43 +0100) it happened nospam <nospam(a)please.invalid> wrote in <50sau5lh16bmdtig155fa5ppbrsdvheadj(a)4ax.com>: >Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: > >>On a sunny day (Fri, 07 May 2010 21:37:22 +0100) it happened nospam >><nospam(a)please.invalid> wrote in <8kt8u55a21v709856fi48o570np4dns79r(a)4ax.com>: >> >>>Jan Panteltje <pNaonStpealmtje(a)yahoo.com> wrote: >>> >>>>Do they not want people to use their chips? >>> >>>It is a relatively new chip, the issues you are complaining about have been >>>documented in freely available errata for about a year (the errata is even >>>linked from digikey product pages). >>> >>>The A8 silicon revision is supposed to have fixed these issues. >>> >>>A reasonable complaint would be about difficulty knowing what silicon >>>revision you can buy. >> >>Do you not think it is strange that it took 8 revisions for it to work (IF it works in A8)? > >The datasheet was issued in Feb 2009 and is still marked preliminary. It is >a new part. I think they didn't make and ship a new silicon revision every >2 months since then. Well, how come then they have 7 silicon eversions???? >>When I bought the Z80, in the 19 eighties, a chip that has a much >>more complicated instruction set, but much easier to use, it worked on all advertised issues. > >A Z80 system with the features of the PIC18F14K22 would have taken a square >foot of PCB stuffed full of chips, take 100 times more power to run at less >than 1/4 the speed. Silly comparison. No it is not silly, is is comparing quality of chip design. |