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From: Jon Slaughter on 13 Apr 2008 00:56
Why not use smaller mosfets to drive larger mosfet gates? One could put them
in the same package so that logic level signals could be used to drive large
mosfets? I'm thinking of implementing that idea discretely but maybe there
is a reason for it? (although its going to cost me about 2x the # of
transistors but its a clean switch)

I imagine that one probably could cascage cmos stages indefinitely to get
very low gate drive requirements?

http://server6.theimagehosting.com/image.php?img=CMOS-CAS.GIF

The above is just an example, I use the same mosfets in each stage but the
point is that each stage is easier to drive. (one might only need 1 or 2
stages for most fets).

Is there any problem with this? (Besides the number of mosfets, but I
imagine its no problem to do in silicon)

Thanks,
Jon


From: D from BC on 13 Apr 2008 01:17
On Sun, 13 Apr 2008 04:56:30 GMT, "Jon Slaughter"
<Jon_Slaughter(a)Hotmail.com> wrote:

>Why not use smaller mosfets to drive larger mosfet gates? One could put them
>in the same package so that logic level signals could be used to drive large
>mosfets? I'm thinking of implementing that idea discretely but maybe there
>is a reason for it? (although its going to cost me about 2x the # of
>transistors but its a clean switch)
>
>I imagine that one probably could cascage cmos stages indefinitely to get
>very low gate drive requirements?
>
>http://server6.theimagehosting.com/image.php?img=CMOS-CAS.GIF
>
>The above is just an example, I use the same mosfets in each stage but the
>point is that each stage is easier to drive. (one might only need 1 or 2
>stages for most fets).
>
>Is there any problem with this? (Besides the number of mosfets, but I
>imagine its no problem to do in silicon)
>
>Thanks,
>Jon
>

I suspect mosfet driver IC designers have thought of everything..
Example of one effort:
The IXDD414 mosfet driver functional diagram
http://ixdev.ixys.com/DataSheet/99061.pdf
shows a N and P FETs in the driver output stage.
Behind that, they're driven by gates (cmos again?)

A chain of cmos drivers might have an annoying propagation delay in
some apps.


D from BC
British Columbia
Canada
From: Jon Slaughter on 13 Apr 2008 01:22

"D from BC" <myrealaddress(a)comic.com> wrote in message
news:b7530458ivejrdl3hvoosk4sid6p3cmm6t(a)4ax.com...
> On Sun, 13 Apr 2008 04:56:30 GMT, "Jon Slaughter"
> <Jon_Slaughter(a)Hotmail.com> wrote:
>
>>Why not use smaller mosfets to drive larger mosfet gates? One could put
>>them
>>in the same package so that logic level signals could be used to drive
>>large
>>mosfets? I'm thinking of implementing that idea discretely but maybe there
>>is a reason for it? (although its going to cost me about 2x the # of
>>transistors but its a clean switch)
>>
>>I imagine that one probably could cascage cmos stages indefinitely to get
>>very low gate drive requirements?
>>
>>http://server6.theimagehosting.com/image.php?img=CMOS-CAS.GIF
>>
>>The above is just an example, I use the same mosfets in each stage but the
>>point is that each stage is easier to drive. (one might only need 1 or 2
>>stages for most fets).
>>
>>Is there any problem with this? (Besides the number of mosfets, but I
>>imagine its no problem to do in silicon)
>>
>>Thanks,
>>Jon
>>
>
> I suspect mosfet driver IC designers have thought of everything..
> Example of one effort:
> The IXDD414 mosfet driver functional diagram
> http://ixdev.ixys.com/DataSheet/99061.pdf
> shows a N and P FETs in the driver output stage.
> Behind that, they're driven by gates (cmos again?)
>
> A chain of cmos drivers might have an annoying propagation delay in
> some apps.
>
>

Hehe, well, thats one that uses one stage. I'm not sure what the
propagation delay would be like but I'd imagine one wouldn't need more than
3 stages so it probably wouldn't be that big of an issue?



From: melee5 on 13 Apr 2008 02:00
On Apr 12, 10:56 pm, "Jon Slaughter" <Jon_Slaugh...(a)Hotmail.com>
wrote:
> Why not use smaller mosfets to drive larger mosfet gates? One could put them
> in the same package so that logic level signals could be used to drive large
> mosfets? I'm thinking of implementing that idea discretely but maybe there
> is a reason for it? (although its going to cost me about 2x the # of
> transistors but its a clean switch)
>
> I imagine that one probably could cascage cmos stages indefinitely to get
> very low gate drive requirements?
>
> http://server6.theimagehosting.com/image.php?img=CMOS-CAS.GIF
>
> The above is just an example, I use the same mosfets in each stage but the
> point is that each stage is easier to drive. (one might only need 1 or 2
> stages for most fets).
>
> Is there any problem with this? (Besides the number of mosfets, but I
> imagine its no problem to do in silicon)
>
> Thanks,
> Jon

Sensitive gate mosfets already exist. IIRC RCA used to offer TTL
level triggered power mosfets when mosfets were but a few years old.
They don't seem offer anything these days but then I lost touch for a
while.
From: Richard The Dreaded Libertarian on 14 Apr 2008 14:33
On Sun, 13 Apr 2008 05:22:39 +0000, Jon Slaughter wrote:
> "D from BC" <myrealaddress(a)comic.com> wrote in message
>> On Sun, 13 Apr 2008 04:56:30 GMT, "Jon Slaughter"
>> <Jon_Slaughter(a)Hotmail.com> wrote:
>>
>>>Why not use smaller mosfets to drive larger mosfet gates? One could put
>>>them
>>>in the same package so that logic level signals could be used to drive
>>>large
>>>mosfets? I'm thinking of implementing that idea discretely but maybe there
>>>is a reason for it? (although its going to cost me about 2x the # of
>>>transistors but its a clean switch)
>>>
>>>I imagine that one probably could cascage cmos stages indefinitely to get
>>>very low gate drive requirements?
>>>
>>>http://server6.theimagehosting.com/image.php?img=CMOS-CAS.GIF
>>>
>>>The above is just an example, I use the same mosfets in each stage but the
>>>point is that each stage is easier to drive. (one might only need 1 or 2
>>>stages for most fets).
>>>
>>>Is there any problem with this? (Besides the number of mosfets, but I
>>>imagine its no problem to do in silicon)
>>
>> I suspect mosfet driver IC designers have thought of everything..
>> Example of one effort:
>> The IXDD414 mosfet driver functional diagram
>> http://ixdev.ixys.com/DataSheet/99061.pdf
>> shows a N and P FETs in the driver output stage.
>> Behind that, they're driven by gates (cmos again?)
>>
>> A chain of cmos drivers might have an annoying propagation delay in
>> some apps.
>
> Hehe, well, thats one that uses one stage. I'm not sure what the
> propagation delay would be like but I'd imagine one wouldn't need more than
> 3 stages so it probably wouldn't be that big of an issue?

I think the point is more like, with the gate capacitance of the big
mosfets, you need to be able to provide a pulse that will load the
gate up with electrons, or suck them out as fast as possible, i.e.,
you have to provide a current spike - the more current your driver
has available to charge/discharge that gate capacitance, the faster
your big mosfet will switch.

Thanks,
Rich

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