DSP with sensor i2c interface
in [FPGA]
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From: Gladys on 30 Jul 2010 04:47 Hi all, I have to interface DSP with 3 image sensor,s there're only two i2c GPIO for DSP, so I need to implement an i2c core in FPGA, I've implemented an i2c slave core to receive data from DSP and store them with a large LUT in my FPGA and another i2c master core in FPGA to send the stored i2c data to the 3 sensors, Now I'm wondering if I can use FPGA as an arbitration core, what the FPGA does is just to detect the start stop condition and the slave address, then directly transfer the data to the right sensor without storing in FPGA itself. I don't know which method is better, and how to implement the second method, could anyone give me some suggestion? Thanks
From: Gabor on 30 Jul 2010 08:49 On Jul 30, 4:47 am, Gladys <yuhu...(a)gmail.com> wrote: > Hi all, > I have to interface DSP with 3 image sensor,s there're only two i2c > GPIO for DSP, so I need to implement an i2c core in FPGA, I've > implemented an i2c slave core to receive data from DSP and store them > with a large LUT in my FPGA and another i2c master core in FPGA to > send the stored i2c data to the 3 sensors, > Now I'm wondering if I can use FPGA as an arbitration core, what the > FPGA does is just to detect the start stop condition and the slave > address, then directly transfer the data to the right sensor without > storing in FPGA itself. > I don't know which method is better, and how to implement the second > method, could anyone give me some suggestion? Thanks There are other options. If you haven't tied down the board design yet you could look at I2C bus switches from NXP and others. These devices allow a single master to access a number of sub-buses to allow multiple parts that consume the same I2C address or larger bus architectures that might create too much load for one I2C segment. Do the sensors all require the same I2C address? if not, you could put more than one on the same bus. Another thing I have done with FPGA's is to implement a pass-through I2C where there is one port for the I2C master and multiple ports to the slaves. The pass-through code flips address bits on the way through so each slave port sees a different address. Then to the master each slave appears at a different location. This way the master doesn't need to do extra operations to switch buses. Your master / slave approach doesn't necessarily require much storage in the FPGA presumably you can just forward each transaction as soon as it is sent. For read operations you can hold off the master using SCL clock-stretching until the operation has been forwarded to the slave. Regards, Gabor
From: Gladys on 30 Jul 2010 10:50
Thank you Gabor, I just found that the FPGA need to store the i2c data and then transfer to the 3 sensor using different i2c bused at the same time, which means the 3 sensors receive the same i2c data, so I still need to implement and i2c slave. As the register address are in 16 bits and not continued, the register data are also in 16bits, is it OK to use an LUT table to store the register data? |