Embedded

MSP430 core performance
Dear Sirs, Has anybody here tested the MSP430 core performance ? I'm interested in DMIPS / 1 MHz . I saw TI Application Report, named MSP430 Competitive Benchmarking of William Goh, but not every test that is mentioned there is clear for me. For example, what does it mean Cycle Count for Dhrystone Analysis ? I... 25 Nov 2009 04:51

interfacing cpld
Hi there, a newbie question, and I would be grateful for a response or at least hint where to look(read) for information. My problem is: I have two synchronisation domains. One device (A) is running at a 2.048 frequency. Then there is a STM32 microcontroller (B) that is using 8 MHz clock source. Dev A gives o... 24 Nov 2009 05:34

New Microchip PIC32 Microcontrollers have Lots of Everything (2 CAN 2.0b, Ethernet, lots more)
http://www.microcontroller.com/news/microchip_pic32_mx5_mx6_mx7.asp New Microchip PIC32 Microcontrollers have two CAN 2.0b interfaces and a 10/100 Ethernet interface on the same chip. Article includes a competitive benchmark and a useful block diagram. - Bill Giovino Executive Editor http://Microcontro... 2 Dec 2009 09:49

Kernel image size
I've recently upgraded a ppc405 build for a Virtex 4 device from kernel 2.6.15 (arch/ppc) to 2.6.31 (arch/powerpc) and the size of the image has increased from about 900k to 1.4M. As far as I can tell I've pretty much the same config options set. The 2.6.15 kernel was straight from the kernel mainline with some ... 21 Nov 2009 16:58

Suggested features for CASE to protect shared stores againstconflicting accesses
Op Wed, 18 Nov 2009 17:09:39 +0100 schreef Ari Okkonen <ari.okkonen(a)obp.fi>: [snip] The shared stores with locking operations improve the communication between tasks. Compared to what? How did you come to this conclusion? Which inter-task communication methods did you investigate? No server ... 21 Jan 2010 20:17

Possible Solution
I had the same problem. FTDI just recently released an app-note called: "AN_130 FT2232H Used In An FT245 Style Synchronous FIFO Mode". In this app. note they say to enable RTS_CTS flow control in the driver. This fixed the problem for me. I would not of thought this would be applicable to the high speed sync-fifo m... 19 Nov 2009 10:32

NIOS and ftoa()
Hi folks- I'm in the beginning stages of crafting a high-speed measurement device which needs to output a floating point value in ASCII string form that represents the measurement at a rate of 10 kHz. I'm using an Altera FPGA that runs Nios2. Convenient standard library functions like sprintf() or ftoa() runni... 19 Nov 2009 15:10

Compact Flash IDE PIO Write Size Issues
As mentioned here: http://www.embeddedrelated.com/usenet/embedded/show/112275-1.php I'm working on converting a hard-drive-based datalogger to work with compact flash. I'm using the flash cards as if they were IDE drives receiving PIO transfers. The general flow of the logger's operation is: Fill buffer to... 17 Nov 2009 12:51

pseudo random number between X and Y?
Hello all I need a function, when called returns a pseudo random number between X and Y. I have many boards that periodically broadcasts their board addresses on an RF link. All boards use the same RF-channel frequency, so data collisions is going to happen. So I need to randomly delay between those... 18 Nov 2009 21:20

OpenOCD+GDB (stepi. Unable to single step)
Hello, I've a small "problem". I first describe the situation::: I have a AT91 microcontroller connected with the host by a amontec JTAG... I start OpenOCD and everithing run OK. In the gdb script (to connect to openocd) i set a hardware breakpoint (with hbreak main), and a continue command... ---------------... 17 Nov 2009 05:02