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From: Vips on 4 May 2010 02:27
Hi Guys

What could be the optimal buffer for an asynchronous FIFO with the
source clock

at 50 MHz and the Read clock is 25 MHz


Data is clming as 8 bits with each clock write . There is no idle
cycle. We have to keep the synchronization latancy also into account.


Thanks

Vips
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