From: Giorgos Tzampanakis on
"jt_eaton" <z3qmtr45(a)n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote
in news:0smdnezRz6VsJr_RnZ2dnUVZ_vednZ2d(a)giganews.com:

> I simulated your code @ 25 Mhz after striping out the
> divider on clock_50 and
> it shows:
>
> 4 us Horizontal pulse every 33.5 us
> 67.1 us Vertical pulse every 17.6 ms
>
>
> Your running it at 15 hz
>

These times look about correct based on http://tinyvga.com/vga-
timing/640x480(a)60Hz .

Am I missing something? The page says these are the 60 Hz
timings.
From: Giorgos Tzampanakis on
Gabor <gabor(a)alacron.com> wrote in
news:2b315a7b-decf-407a-a018-97425e869103(a)c10g2000yqi.googlegro
ups.com:

> If your monitor doesn't lock, you should make sure that the
> sync signals
> are actually reaching the sync pins of the monitor. Also
> check if the working version of the VGA code gives the same
> active level for the sync pulses. Most monitors use the
> sync active level as a code to suggest a resolution
> standard. This comes from the original VESA definitions for
> PC video. Getting it wrong doesn't usually prevent the
> monitor from syncing, but your monitor may be more finicky.
>

I will check those suggestions, but I have no control over the
level, I can only set it to 0 or 1 within the fpga, so it's
unlikely that there is some problem there, given that the demo
program runs fine.
From: Giorgos Tzampanakis on
Giorgos Tzampanakis <gt67(a)hw.ac.uk> wrote in
news:Xns9DA0B66A6D054fdnbgui7uhu5h8hrnuio(a)188.40.43.230:

> I've been trying to code a simple VGA controller to run on
> my Altera DE1 board. You can see my code here:
>
> http://pastebin.com/GMfxs6Xz
>
> Note that my board has a DAC which converts the 4-bit
> digital signal for each of the RGB colors to the analog
> signal required by VGA. The timings are as found here for
> example:
>
> http://tinyvga.com/vga-timing/640x480(a)60Hz
>
> When I run this code the monitor leaves the "No Signal
> Found" indication but it stays black no matter which color I
> choose.
>
> I know that the board works because the VGA output works
> fine with the demonstration provided by Altera.
>
> Any help greatly appreciated.

Fixed. The problem was that I was only driving the horizontal
sync pulses while the pixel rgb values were driven.
From: Gabor on
On Jun 24, 11:17 am, Giorgos Tzampanakis <g...(a)hw.ac.uk> wrote:
> Gabor <ga...(a)alacron.com> wrote innews:2b315a7b-decf-407a-a018-97425e869103(a)c10g2000yqi.googlegro
> ups.com:
>
> > If your monitor doesn't lock, you should make sure that the
> > sync signals
> > are actually reaching the sync pins of the monitor.  Also
> > check if the working version of the VGA code gives the same
> > active level for the sync pulses.  Most monitors use the
> > sync active level as a code to suggest a resolution
> > standard.  This comes from the original VESA definitions for
> > PC video.  Getting it wrong doesn't usually prevent the
> > monitor from syncing, but your monitor may be more finicky.
>
> I will check those suggestions, but I have no control over the
> level, I can only set it to 0 or 1 within the fpga, so it's
> unlikely that there is some problem there, given that the demo
> program runs fine.

What I meant by "levels" was active high vs active low, not the
actual voltage which should be TTL. Anyway glad to see you've
got it fixed.

regards,
Gabor
From: jt_eaton on
>"jt_eaton" <z3qmtr45(a)n_o_s_p_a_m.n_o_s_p_a_m.gmail.com> wrote
>in news:0smdnezRz6VsJr_RnZ2dnUVZ_vednZ2d(a)giganews.com:
>
>> I simulated your code @ 25 Mhz after striping out the
>> divider on clock_50 and
>> it shows:
>>
>> 4 us Horizontal pulse every 33.5 us
>> 67.1 us Vertical pulse every 17.6 ms
>>
>>
>> Your running it at 15 hz
>>
>
>These times look about correct based on http://tinyvga.com/vga-
>timing/640x480(a)60Hz .
>
>Am I missing something? The page says these are the 60 Hz
>timings.
>
My Bad. I grabbed the wrong number when I divided.

John

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