From: Giorgos Tzampanakis on 23 Jun 2010 12:55 I've been trying to code a simple VGA controller to run on my Altera DE1 board. You can see my code here: http://pastebin.com/GMfxs6Xz Note that my board has a DAC which converts the 4-bit digital signal for each of the RGB colors to the analog signal required by VGA. The timings are as found here for example: http://tinyvga.com/vga-timing/640x480(a)60Hz When I run this code the monitor leaves the "No Signal Found" indication but it stays black no matter which color I choose. I know that the board works because the VGA output works fine with the demonstration provided by Altera. Any help greatly appreciated.
From: Gabor on 23 Jun 2010 16:22 On Jun 23, 12:55 pm, Giorgos Tzampanakis <g...(a)hw.ac.uk> wrote: > I've been trying to code a simple VGA controller to run on my > Altera DE1 board. You can see my code here: > > http://pastebin.com/GMfxs6Xz > > Note that my board has a DAC which converts the 4-bit digital > signal for each of the RGB colors to the analog signal required > by VGA. The timings are as found here for example: > > http://tinyvga.com/vga-timing/640x480(a)60Hz > > When I run this code the monitor leaves the "No Signal Found" > indication but it stays black no matter which color I choose. > > I know that the board works because the VGA output works fine > with the demonstration provided by Altera. > > Any help greatly appreciated. Have you simulated this? Just looking quickly I don't see how vga_hs works. It looks like maybe your sync pulses are only one clock long. That won't drive any monitor I know of. -- Gabor
From: Giorgos Tzampanakis on 23 Jun 2010 19:01 Gabor <gabor(a)alacron.com> wrote in news:cc66c286-0547-416a- 9edf-3c43de9b7807(a)f8g2000vbl.googlegroups.com: > Have you simulated this? Just looking quickly I don't see how > vga_hs works. It looks like maybe your sync pulses are only > one clock long. That won't drive any monitor I know of. I run it on the board and look at the signals using SignalTap or an external logic analyzer. It doesn't simulate correctly on the simulator, but the signals are as expected on the logic analyzer. The pulses are not one clock long, notice: case (next_state) `vertical_sync: begin vga_vs <= 1'b0; if (line_count == `max_vertical_sync_count && pulse_count == `max_pulse_count) next_state <= `vertical_front_porch; end etc... So the low value on the sync pin will stay until the machine moves on to the next state. Why did you think that the pulse only stays for one clock cycle?
From: jt_eaton on 23 Jun 2010 21:59 >I've been trying to code a simple VGA controller to run on my >Altera DE1 board. You can see my code here: > >http://pastebin.com/GMfxs6Xz > >Note that my board has a DAC which converts the 4-bit digital >signal for each of the RGB colors to the analog signal required >by VGA. The timings are as found here for example: > >http://tinyvga.com/vga-timing/640x480(a)60Hz > >When I run this code the monitor leaves the "No Signal Found" >indication but it stays black no matter which color I choose. > >I know that the board works because the VGA output works fine >with the demonstration provided by Altera. > >Any help greatly appreciated. > I simulated your code @ 25 Mhz after striping out the divider on clock_50 and it shows: 4 us Horizontal pulse every 33.5 us 67.1 us Vertical pulse every 17.6 ms Your running it at 15 hz John --------------------------------------- Posted through http://www.FPGARelated.com
From: Gabor on 24 Jun 2010 10:43 On Jun 23, 7:01 pm, Giorgos Tzampanakis <g...(a)hw.ac.uk> wrote: > Gabor <ga...(a)alacron.com> wrote in news:cc66c286-0547-416a- > 9edf-3c43de9b7...(a)f8g2000vbl.googlegroups.com: > > > > > Have you simulated this? Just looking quickly I don't see > how > > vga_hs works. It looks like maybe your sync pulses are only > > one clock long. That won't drive any monitor I know of. > > I run it on the board and look at the signals using SignalTap > or an external logic analyzer. It doesn't simulate correctly on > the simulator, but the signals are as expected on the logic > analyzer. > > The pulses are not one clock long, notice: > > case (next_state) > `vertical_sync: begin > vga_vs <= 1'b0; > if (line_count == > `max_vertical_sync_count && pulse_count == > `max_pulse_count) > next_state <= `vertical_front_porch; > end > > etc... > > So the low value on the sync pin will stay until the machine > moves on to the next state. Why did you think that the pulse > only stays for one clock cycle? As I said I only looked at it quickly and saw lines 74 and 75 setting the sync pulses high (outside the state machine case statement), which is something I usually do to create pulses. Looking back at the code I see that the value is assigned throughout the state. If your monitor doesn't lock, you should make sure that the sync signals are actually reaching the sync pins of the monitor. Also check if the working version of the VGA code gives the same active level for the sync pulses. Most monitors use the sync active level as a code to suggest a resolution standard. This comes from the original VESA definitions for PC video. Getting it wrong doesn't usually prevent the monitor from syncing, but your monitor may be more finicky. Regards, Gabor
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