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From: Ed McGettigan on 19 Jul 2010 12:26 On Jul 18, 10:37 pm, Muzaffer Kal <k...(a)dspia.com> wrote: > On Sun, 18 Jul 2010 21:11:18 -0700 (PDT), Vips > > <thevipulsi...(a)gmail.com> wrote: > >Thanks for the reply.. Let me add that the Master has SDA_IN( input) > >SDA_TRISTATE( output) this is a simple output with no tristate. SCL_IN > >(input) SCL_TRISTATE(OUTPUT). Now I am confused as How the first start > >will be generated as who will toggle the SDA_IN line which is the > >input to the master for the START generation while the SCK_IN is > >high .... > > Because I2C is an open-drain (open collector) interface it doesn't > need to drive any of the outputs high ie high level generation is done > by the external pullup. This can be accomplished with a push-pull IO > by driving a strong zero and tri-state for one. So you need a regular > tri-state IO and drive zero when tri-state is inactive and tri-state > when it is active ie (assuming active high tri-state IOPAD): > > IOPAD master_sda(.IN(sda_in), .OUT(sda_tristate), .OE(sda_tristate), > .PAD(sda_wire)); > -- > Muzaffer Kal > > DSPIA INC. > ASIC/FPGA Design Services > > http://www.dspia.com Without knowing the functionality of the SDA_TRISTATE output (does 1=HiZ or does 1=Drive, my bet would be HiZ) and the functionality of the IOPAD OE pin (this isn't a Xilinx cell, but OE usually mean Output Enable/Drive) your code may not work. |