Interesting TIA design
in [Design]
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From: krw on 28 Oct 2009 20:26 On Wed, 28 Oct 2009 17:11:54 -0700, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Wed, 28 Oct 2009 18:48:12 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: > >>On Tue, 27 Oct 2009 19:42:41 -0700, John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Tue, 27 Oct 2009 18:20:41 -0700, Joerg <invalid(a)invalid.invalid> >>>wrote: >>> >>>>John Larkin wrote: >>>> >>>>[...] >>>> >>>>> Yup, I do my schematics with pencil on D-size vellum, and give them to >>>>> The Brat to cad for me. >>>>> >>>> >>>>But don't overdo it. She may some day be the one deciding which nursing >>>>home your are going to live at ... >>> >>>Heck, all of engineering, including me, are working for her already. >>> >>>R wants her to do FPGA design next. So I'm scheduled to do a couple of >>>lectures on basic digital design concepts, and then he'll do a couple >>>on FPGAs and VHDL in particular. >> >>As long as she's hasn't done much programming, particularly in C, she >>has a shot. If she has, forget it. Her brain is already fried. > >No programming at all. I was explaining to her, at the bar at Zuni, >how programmers execute a line of code at a time. And then I said, >imagine that you're looking at a scene full of still objects. When you >blink your eyes, a clock ticks, and when you open them again >everything has moved, all at once. That's synchronous logic. She said >"sure." So there's hope. Good explanation (though I think I would have used a disco strobe as an example ;). Don't teach her about "delta cycles" until she has the basics down. When they teach VHDL they usually start with that stuff and many never get over it. ...then they totally gloss over libraries. Grrr! I had a really good introduction to VHDL book once, but it grew legs. It came from the synthesis angle and showed examples standard logic elements that were really good templates to use to direct the synthesis tools. Unfortunately the book grew legs. I use Ashenden as a reference but it really isn't any good for such things and I would never spring it on a newb.
From: Jim Thompson on 28 Oct 2009 20:37 On Wed, 28 Oct 2009 19:26:47 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: [snip] > >I had a really good introduction to VHDL book once, but it grew legs. >It came from the synthesis angle and showed examples standard logic >elements that were really good templates to use to direct the >synthesis tools. Unfortunately the book grew legs. [snip] Title? Author? ISBN? I'd like to learn to do some simple synthesis so I don't have to bug a very busy associate. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | "Somebody had to build the ceiling... before Michelangelo could go to work." - John Ratzenberger http://analog-innovations.com/SED/Somebody_had_to_build_the_ceiling.pdf
From: John Larkin on 28 Oct 2009 20:49 On Wed, 28 Oct 2009 19:26:47 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: >On Wed, 28 Oct 2009 17:11:54 -0700, John Larkin ><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: > >>On Wed, 28 Oct 2009 18:48:12 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: >> >>>On Tue, 27 Oct 2009 19:42:41 -0700, John Larkin >>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>> >>>>On Tue, 27 Oct 2009 18:20:41 -0700, Joerg <invalid(a)invalid.invalid> >>>>wrote: >>>> >>>>>John Larkin wrote: >>>>> >>>>>[...] >>>>> >>>>>> Yup, I do my schematics with pencil on D-size vellum, and give them to >>>>>> The Brat to cad for me. >>>>>> >>>>> >>>>>But don't overdo it. She may some day be the one deciding which nursing >>>>>home your are going to live at ... >>>> >>>>Heck, all of engineering, including me, are working for her already. >>>> >>>>R wants her to do FPGA design next. So I'm scheduled to do a couple of >>>>lectures on basic digital design concepts, and then he'll do a couple >>>>on FPGAs and VHDL in particular. >>> >>>As long as she's hasn't done much programming, particularly in C, she >>>has a shot. If she has, forget it. Her brain is already fried. >> >>No programming at all. I was explaining to her, at the bar at Zuni, >>how programmers execute a line of code at a time. And then I said, >>imagine that you're looking at a scene full of still objects. When you >>blink your eyes, a clock ticks, and when you open them again >>everything has moved, all at once. That's synchronous logic. She said >>"sure." So there's hope. > >Good explanation (though I think I would have used a disco strobe as >an example ;). Don't teach her about "delta cycles" until she has the >basics down. I won't, because I have no idea what a delta cycle is. When they teach VHDL they usually start with that stuff >and many never get over it. ...then they totally gloss over libraries. >Grrr! > >I had a really good introduction to VHDL book once, but it grew legs. >It came from the synthesis angle and showed examples standard logic >elements that were really good templates to use to direct the >synthesis tools. Unfortunately the book grew legs. I use Ashenden as >a reference but it really isn't any good for such things and I would >never spring it on a newb. I don't do VHDL. R does that for me. I just tell him what I want. John
From: krw on 28 Oct 2009 21:32 On Wed, 28 Oct 2009 17:37:10 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon(a)My-Web-Site.com> wrote: >On Wed, 28 Oct 2009 19:26:47 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: > >[snip] >> >>I had a really good introduction to VHDL book once, but it grew legs. >>It came from the synthesis angle and showed examples standard logic >>elements that were really good templates to use to direct the >>synthesis tools. Unfortunately the book grew legs. >[snip] > >Title? Author? ISBN? I'd like to learn to do some simple synthesis >so I don't have to bug a very busy associate. I wish I had it. :-( I'll try to do an Amazon search for it. It was a fairly short book but really good for synthesis stuff. The hard parts of VHDL are the parts not used for synthesis.
From: krw on 28 Oct 2009 21:34
On Wed, 28 Oct 2009 17:49:55 -0700, John Larkin <jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >On Wed, 28 Oct 2009 19:26:47 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: > >>On Wed, 28 Oct 2009 17:11:54 -0700, John Larkin >><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >> >>>On Wed, 28 Oct 2009 18:48:12 -0500, krw <krw(a)att.bizzzzzzzzzzz> wrote: >>> >>>>On Tue, 27 Oct 2009 19:42:41 -0700, John Larkin >>>><jjlarkin(a)highNOTlandTHIStechnologyPART.com> wrote: >>>> >>>>>On Tue, 27 Oct 2009 18:20:41 -0700, Joerg <invalid(a)invalid.invalid> >>>>>wrote: >>>>> >>>>>>John Larkin wrote: >>>>>> >>>>>>[...] >>>>>> >>>>>>> Yup, I do my schematics with pencil on D-size vellum, and give them to >>>>>>> The Brat to cad for me. >>>>>>> >>>>>> >>>>>>But don't overdo it. She may some day be the one deciding which nursing >>>>>>home your are going to live at ... >>>>> >>>>>Heck, all of engineering, including me, are working for her already. >>>>> >>>>>R wants her to do FPGA design next. So I'm scheduled to do a couple of >>>>>lectures on basic digital design concepts, and then he'll do a couple >>>>>on FPGAs and VHDL in particular. >>>> >>>>As long as she's hasn't done much programming, particularly in C, she >>>>has a shot. If she has, forget it. Her brain is already fried. >>> >>>No programming at all. I was explaining to her, at the bar at Zuni, >>>how programmers execute a line of code at a time. And then I said, >>>imagine that you're looking at a scene full of still objects. When you >>>blink your eyes, a clock ticks, and when you open them again >>>everything has moved, all at once. That's synchronous logic. She said >>>"sure." So there's hope. >> >>Good explanation (though I think I would have used a disco strobe as >>an example ;). Don't teach her about "delta cycles" until she has the >>basics down. > >I won't, because I have no idea what a delta cycle is. It's an important concept (one you'd say, "so?") but it just confuses things unnecessarily. > When they teach VHDL they usually start with that stuff >>and many never get over it. ...then they totally gloss over libraries. >>Grrr! >> >>I had a really good introduction to VHDL book once, but it grew legs. >>It came from the synthesis angle and showed examples standard logic >>elements that were really good templates to use to direct the >>synthesis tools. Unfortunately the book grew legs. I use Ashenden as >>a reference but it really isn't any good for such things and I would >>never spring it on a newb. > >I don't do VHDL. R does that for me. I just tell him what I want. Sure. You've said as much. |