Inverting bits
in [DSP]
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From: robert bristow-johnson on 3 Jan 2010 00:44 On Jan 3, 12:36 am, Eric Jacobsen <eric.jacob...(a)ieee.org> wrote: > On 1/2/2010 10:23 PM, robert bristow-johnson wrote: > > > On Jan 2, 11:45 pm, Vladimir Vassilevsky<nos...(a)nowhere.com> wrote: > > ... > >> My point is that hardware logic doesn't have to be binary. So it doesn't > >> have to store integer number of bits. I can think of 3-state system from > >> combinatorial logic as well as 3-level semi-analog solutions. > > > that is the kernel. i did not consider multi-value logic. i remember > > that was supposed to be the rage in the 80s when i was a grad student. > > i never saw anything come of it, but i s'pose someone somewhere made > > use of multivalued logic. it just seems as the B+ voltage drops from > > 5 volts to 3.3 to even less, that multivalued logic loses its > > feasibility. and it seems that industry would rather put a zillion > > "pins" (or pads or balls) on their chips than cut the number in half > > and use 4-valued logic. > > > A lot of the popular FLASH memory technologies are multi-state and the > memory cells each store multiple bits (two, IIRC). i didn't know that. do those flash products have multi-state connections? or are their I/O pins binary (so they can connect directly to regular, old logic)? r b-j
From: Eric Jacobsen on 3 Jan 2010 00:44 On 1/2/2010 7:09 PM, Jerry Avins wrote: > Eric Jacobsen wrote: >> On 1/2/2010 11:00 AM, Avier wrote: >>> suppose if am having a clock frequency of 60 Mhz and i want to invert >>> every third bit that is inverting signal at 20Mhz . what could be the >>> best solution in terms of least number of storage bits . >>> >>> i think a counter can be used but how many storage bits we will count >>> it? >>> >>> any other solutions >> >> The answer depends on what you're trying to optimize. Do you just want >> a solution that works? Or a solution with the minimum number of >> states? Or a solution with the minimum hardware complexity? Or a >> solution with the least power consumption? Or a solution with the >> least number of software instructions? >> >> Three D-flops connected in a ring will do it. I don't know if that >> will satisfy your professor, though. > > Two D flip-flops and a decoder gate for one of the states will do it > too. Another decoder for the invert state, and an XOR to do the > inversion. Adding the third flip-flop obviates the need for both decoder > gates, so it's the better solution. > > Jerry I don't know that I'd call it the "better" solution unless it fits whatever optimization criterion is specified, and we don't know what might be (or if the OP said it, I missed it). I just tend to try to think of things in simplest terms, and to me a ring of D-flops that come out of reset with two cleared and one set does the job, with the peripheral XOR gate doing the inversion. It might not the better solution for certain optimization problems, but I think it'd meet many. If flip-flops are a precious resource and gates are plentiful, then your solution with two flops and a few gates would be "better". These days hardware logic resources are generally so cheap that just having the discussion about which would be "better" is a counter-productive waste of time. Just put down the first circuit that works and move the hell on to the next...! ;) -- Eric Jacobsen Minister of Algorithms Abineau Communications http://www.abineau.com
From: Tim Wescott on 3 Jan 2010 01:06 On Sat, 02 Jan 2010 21:44:03 -0800, robert bristow-johnson wrote: > On Jan 3, 12:36 am, Eric Jacobsen <eric.jacob...(a)ieee.org> wrote: >> On 1/2/2010 10:23 PM, robert bristow-johnson wrote: >> >> > On Jan 2, 11:45 pm, Vladimir Vassilevsky<nos...(a)nowhere.com> wrote: >> > ... >> >> My point is that hardware logic doesn't have to be binary. So it >> >> doesn't have to store integer number of bits. I can think of 3-state >> >> system from combinatorial logic as well as 3-level semi-analog >> >> solutions. >> >> > that is the kernel. i did not consider multi-value logic. i >> > remember that was supposed to be the rage in the 80s when i was a >> > grad student. i never saw anything come of it, but i s'pose someone >> > somewhere made use of multivalued logic. it just seems as the B+ >> > voltage drops from 5 volts to 3.3 to even less, that multivalued >> > logic loses its feasibility. and it seems that industry would rather >> > put a zillion "pins" (or pads or balls) on their chips than cut the >> > number in half and use 4-valued logic. >> >> >> A lot of the popular FLASH memory technologies are multi-state and the >> memory cells each store multiple bits (two, IIRC). > > i didn't know that. do those flash products have multi-state > connections? or are their I/O pins binary (so they can connect directly > to regular, old logic)? Intel made a big deal of having that when they started. The pinout (and voltage levels) are bog-standard JEDEC -- only the innards are multi- level. -- www.wescottdesign.com
From: Tim Wescott on 3 Jan 2010 01:07 On Sat, 02 Jan 2010 22:39:23 -0600, Vladimir Vassilevsky wrote: > robert bristow-johnson wrote: > >> On Jan 2, 1:16 pm, Vladimir Vassilevsky <nos...(a)nowhere.com> wrote: >> >>>robert bristow-johnson wrote: >>> >>>>that being said, it sounds like you need a counter. i'm sure someone >>>>has a nice compact divide-by-3 counter circuit laying around. it >>>>would need at least 2 flip-flops in it. >>> >>>^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Nope. >>> >>>There is about a zillion of ways for making N-state flip-flop, i.e. >>>flip-flap-flop for 3 states, flip-flap-flup-flop for 4 states, etc. >> >> >> i don't understand what you are referring to by "Nope". was it my >> first or second or third statement that was inaccurate? > > You don't have to use two flip-flops to divide by 3. A 3-state counter > could be done entirely without flip-flops. But there will be some storage someplace, whether you're using a chip called a 'flip flop' or whether you're doing the same thing with gates. -- www.wescottdesign.com
From: Tim Wescott on 3 Jan 2010 01:09
On Sat, 02 Jan 2010 21:09:21 -0500, Jerry Avins wrote: > Eric Jacobsen wrote: >> On 1/2/2010 11:00 AM, Avier wrote: >>> suppose if am having a clock frequency of 60 Mhz and i want to invert >>> every third bit that is inverting signal at 20Mhz . what could be >>> the best solution in terms of least number of storage bits . >>> >>> i think a counter can be used but how many storage bits we will count >>> it? >>> >>> any other solutions >> >> The answer depends on what you're trying to optimize. Do you just >> want a solution that works? Or a solution with the minimum number of >> states? >> Or a solution with the minimum hardware complexity? Or a solution >> with the least power consumption? Or a solution with the least number >> of software instructions? >> >> Three D-flops connected in a ring will do it. I don't know if that >> will satisfy your professor, though. > > Two D flip-flops and a decoder gate for one of the states will do it > too. Another decoder for the invert state, and an XOR to do the > inversion. Adding the third flip-flop obviates the need for both decoder > gates, so it's the better solution. > > Jerry Or, if you're pulling chips off the shelf, a pair of J-K flip flops (in one chip) will do the job without any decoding at all -- just the one XOR for the data. -- www.wescottdesign.com |