Inverting bits
in [DSP]
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From: Muzaffer Kal on 3 Jan 2010 12:27 On Sat, 02 Jan 2010 22:45:37 -0600, Vladimir Vassilevsky <nospam(a)nowhere.com> wrote: > > >robert bristow-johnson wrote: > >> On Jan 2, 1:16 pm, Vladimir Vassilevsky <nos...(a)nowhere.com> wrote: >> >>>robert bristow-johnson wrote: >>> >>>>that being said, it sounds like you need a counter. i'm sure someone >>>>has a nice compact divide-by-3 counter circuit laying around. it >>>>would need at least 2 flip-flops in it. >>> >>>^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ >>>Nope. >>> >>>There is about a zillion of ways for making N-state flip-flop, i.e. >>>flip-flap-flop for 3 states, flip-flap-flup-flop for 4 states, etc. >> >> >> i don't understand what you are referring to by "Nope". was it my >> first or second or third statement that was inaccurate? >> >> just curious. > >My point is that hardware logic doesn't have to be binary. So it doesn't >have to store integer number of bits. I can think of 3-state system from >combinatorial logic as well as 3-level semi-analog solutions. I would be interested to see how the former is done assuming you're really making a distinction between the two. It depends on what you mean by "logic" but if it's not a 3-level one (which needs comparators ie semi-analog) how does one get a 3-state system from combinatorial logic (with only two possible outputs at every gate?) ? -- Muzaffer Kal DSPIA INC. ASIC/FPGA Design Services http://www.dspia.com
From: Muzaffer Kal on 3 Jan 2010 12:33 On Sat, 2 Jan 2010 21:44:03 -0800 (PST), robert bristow-johnson <rbj(a)audioimagination.com> wrote: >On Jan 3, 12:36�am, Eric Jacobsen <eric.jacob...(a)ieee.org> wrote: >> On 1/2/2010 10:23 PM, robert bristow-johnson wrote: >> >> > On Jan 2, 11:45 pm, Vladimir Vassilevsky<nos...(a)nowhere.com> �wrote: >> > ... >> >> My point is that hardware logic doesn't have to be binary. So it doesn't >> >> have to store integer number of bits. I can think of 3-state system from >> >> combinatorial logic as well as 3-level semi-analog solutions. >> >> > that is the kernel. �i did not consider multi-value logic. �i remember >> > that was supposed to be the rage in the 80s when i was a grad student. >> > i never saw anything come of it, but i s'pose someone somewhere made >> > use of multivalued logic. �it just seems as the B+ voltage drops from >> > 5 volts to 3.3 to even less, that multivalued logic loses its >> > feasibility. and it seems that industry would rather put a zillion >> > "pins" (or pads or balls) on their chips than cut the number in half >> > and use 4-valued logic. >> >> >> A lot of the popular FLASH memory technologies are multi-state and the >> memory cells each store multiple bits (two, IIRC). > >i didn't know that. do those flash products have multi-state >connections? or are their I/O pins binary (so they can connect >directly to regular, old logic)? No, their IO pins are binary. One can store different voltage levels at internal cells and reading them needs voltage comparators to distinguish levels so if you can write 4 distinct voltage you get a 2 bit cell. I don't know of any 3-level MLC flash (they're already doing 8 levels). When you start doing MLC flash, you need better calibration, better analog blocks and error-correction. One can imagine a flash cell as a communication medium. The higher the number of levels you want to write the more attention one needs to pay to noise-immunity, SNR, error-correction etc. Of course what ails flash gets worse with MLC. One can't read/write MLC as fast as SLC and when cells start failing due to excess writes MLC fails faster than SLC. -- Muzaffer Kal DSPIA INC. ASIC/FPGA Design Services http://www.dspia.com
From: glen herrmannsfeldt on 3 Jan 2010 16:19 Jerry Avins <jya(a)ieee.org> wrote: > Tim Wescott wrote: (snip) >> Or, if you're pulling chips off the shelf, a pair of J-K flip flops (in >> one chip) will do the job without any decoding at all -- just the one XOR >> for the data. > Count to three with two FFs and no gate? I know how JK FF's are supposed to work, but hardly ever see them used that way. It wouldn't surprise me that, with appopriate connections, JK could make a mod 3 counter. If you are counting gates, JK have some extra gates that T or D FF's don't have. Or, for that matter, J-Kbar FF's. -- glen
From: Vladimir Vassilevsky on 3 Jan 2010 16:24 Vladimir Vassilevsky wrote: > > It is possible to make 3-state system > from conventional _binary_ gates without flip-flops. I.e. you can make > ternary flip-flap-flop directly from combinatorial logic. Here it is: http://www.abvolt.com/misc/flip_flap_flop.pdf Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
From: Tim Wescott on 3 Jan 2010 20:56
On Sun, 03 Jan 2010 21:19:18 +0000, glen herrmannsfeldt wrote: > Jerry Avins <jya(a)ieee.org> wrote: >> Tim Wescott wrote: > (snip) > >>> Or, if you're pulling chips off the shelf, a pair of J-K flip flops >>> (in one chip) will do the job without any decoding at all -- just the >>> one XOR for the data. > >> Count to three with two FFs and no gate? > > I know how JK FF's are supposed to work, but hardly ever see them used > that way. It wouldn't surprise me that, with appopriate connections, JK > could make a mod 3 counter. > > If you are counting gates, JK have some extra gates that T or D FF's > don't have. Or, for that matter, J-Kbar FF's. > > -- glen For simple state machines you can often minimize or eliminate external logic using J-K flip flops. Of course, these days you just write something in some HDL and program a PAL or a FPGA; 7400 series logic is for geezers, analog circuit designers, and other weirdos. -- www.wescottdesign.com |