Is it time to stop research in Computer Architecture ?
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From: Terje Mathisen on 24 Oct 2009 02:59 On Oct 23, 1:45 pm, Mayan Moudgill <ma...(a)bestweb.net> wrote: > Andy "Krazy" Glew wrote: > > E.g. Terje, you're known to be a Larrabee fan. Can you vectorize CABAC? > > Not a chance. > > > For example: divide the image up into subblocks, and run CABAC on each > > subblock in parallel. > > Problem is with the standard. H.264 specifies that the frame is CABAC > encoded. Not quite: H.264 defines two alternate encoding schemes, of which CABAC gets the better compression, but it is fully compliant to use the other (I don't remember the name of it) if the encoder wants to. However, since a decoder has to be able to handle CABAC as well, that limits the maximum bitrate that you can support in sw. Terje
From: Terje Mathisen on 24 Oct 2009 03:08 On Oct 23, 8:11 pm, ga...(a)allegro.com (Gavin Scott) wrote: > For PA-RISC capability HP had very high hopes for dynamic translation. > One slide from fairly early on suggests they expected to get to 50% > of native performance using translation. In reality they failed to > scrounge up enough cleverness to do it well, and the PA-RISC > compatibility on IPF has always been poor enough that the performance > is commonly considered unacceptable even for business applications. That's interesting: IA64 seemed to have a close to complete superset of all PA-RISC features/instructions, including some very funky address shift/ combination operations specifically claimed to be there to support PS- RISC features. The register set was so much larger that it could be mapped statically. If all this hw support didn't get at least 50%, then the clock rate must have been very disappointing (which it was, right?). Terje
From: Bill Todd on 24 Oct 2009 03:10 Del Cecchi wrote: .... > Did HP ever do another PARISC post Itanium? HP had at least one new generation of PA-RISC ship after the first usable Itanics. They clearly knew before Y2K that it would need that to bridge the gap to any real ability of Itanic to take over that portion of its market. IIRC that new generation had relatively little in the way of new core development beyond a process shrink and move to dual cores but did improve the performance of the memory hierarchy (though I'd have to check before stating any of that with certainty). What do HP servers have > in them now? Itanium and X86? from http://www.hp.com/products1/evolution/9000/eol_announcement.html : "The last order date for HP9000 PA-RISC systems was December 31, 2008. Operating system releases for HP-UX will continue shipping past the HP9000 systems last order date, meeting their roadmap commitments for new releases and support. "The last order date for new HP9000 PA-RISC add-on options and upgrades will be December 31, 2009 and ship date of April 1, 2010. (Add-on options and upgrades refer to the addition of CPUs, Memory, I/O, or storage options into installed systems, as well as the expansion of installed systems.) Services parts and materials will continue to be available at least through 2013 to continue to meet your service and support needs." from http://h18002.www1.hp.com/alphaserver/index.html : "October 2008: AlphaServers are still available within HP as Extended Life Products. Factory-Refurbished Systems and Options with Full Warranty are available through the HP Renew Program in EMEA, AP, and Japan, and available through Technology Value Solutions in the Americas. HP will now offer service (maintenance, repair, and advisory) for all currently selling Alpha Systems for a ''minimum'' of five years after last new system shipment, (or at least through 2013). "May 2007: HP has ceased accepting orders for new Alpha Systems as of April 27, 2007. Customers can still order upgrades, add-ons and options until April 25, 2008. HP will continue to offer factory-refurbished systems and options through the HP Renew Program in EMEA, AP, and Japan; and Technology Value Solutions (TVS) in the Americas. HP will offer service (maintenance, repair, and advisory) for all currently selling Alpha Systems for a minimum of five years after last system shipment, or at least through 2012. Typically, HP offers services much longer than the five year minimum commitment. HP still offers service on all Alpha Systems shipped since their original introduction in 1992." A quick search did not reveal any end-of-sales date for MIPS servers (Tandem being another company that disappeared into Compaq's maw before Compaq disappeared into HP's.) Even designs a half-decade or more behind the curve (if they're good ones) can be more attractive to many customers than switching platforms to something not that dramatically superior. - bill
From: nmm1 on 24 Oct 2009 03:45 In article <7kfedtF39bh24U1(a)mid.individual.net>, Del Cecchi <delcecchiofthenorth(a)gmail.com> wrote: > >> No way. Sorry. HP had restarted the PA-RISC line by then, IBM had >> restarted POWER, MIPS was available for purchase (and there were >> many companies with the resources to take it over and restart it), >> SPARC was still very much alive, and doubtless there were other >> plots >> and plans. > >IBM had never stopped Power development. It did get side tracked a >little since RS6000 wasn't exactly setting world on fire. And Iliad >was in there somewhere. (power derivative) Yes. Mayan has already pointed out that I had over-simplified to the point of incorrectness. >Did HP ever do another PARISC post Itanium? What do HP servers have >in them now? Itanium and X86? Yes, several. The PA-RISC development wasn't finally turned off until HP could see clearly how IA64 and 64-bit x86 were going. The originally announced plan was that it would be, but HP kept some things up their sleeve (as I had predicted). They certainly COULD have continued it if 64-bit x86 had not started to take off. As far as I know, the only companies that burnt their boats were SGI and some resellers (Tadpole, was it?) All of the major vendors kept some sort of an alternative on the back burner - as any competent company of that scale would have done, and as many of us were certain they were doing. Regards, Nick Maclaren.
From: nmm1 on 24 Oct 2009 03:53
In article <891c9f99-443f-46ed-81cb-71a37bbf83e0(a)31g2000vbf.googlegroups.com>, Terje Mathisen <terje.wiig.mathisen(a)gmail.com> wrote: > >IA64 seemed to have a close to complete superset of all PA-RISC >features/instructions, including some very funky address shift/ >combination operations specifically claimed to be there to support PS- >RISC features. > >The register set was so much larger that it could be mapped >statically. > >If all this hw support didn't get at least 50%, then the clock rate >must have been very disappointing (which it was, right?). It was, but that wasn't the only reason. One of the things that marketdroids and technofreaks miss is that the devil is in the details; complexity COSTS - and NOT just directly. I believe that my prediction of nightmarish difficulties with interrupt handling was fulfilled, and those groups persist on ignoring it and other messy, engineering overheads. Exactly what the causes of loss of efficiency were, I can't say, but it assuredly wasn't just the clock speed. Regards, Nick Maclaren. |