Jihad needs scientists
in [Design]
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From: krw on 12 Mar 2007 20:44 In article <c55a1$45f5eebb$49ecfae$14595(a)DIALUPUSA.NET>, nonsense(a)unsettled.com says... > MassiveProng wrote: > > > On Mon, 12 Mar 2007 14:34:47 +0000 (UTC), kensmith(a)green.rahul.net > > (Ken Smith) Gave us: > > > > > >>In article <45F4CF7A.BD6428AD(a)hotmail.com>, > >>Eeyore <rabbitsfriendsandrelations(a)hotmail.com> wrote: > >>[....] > >> > >>>So Mr Expert. Why isn't TTL made on a 40 Volt process ? > >> > >>Thats obvious. Its so there is a market for MOSFET drivers. I still want > >>a PIC made with Supertex's HV CMOS. > >> > > > > > > > > Tell us, oh masterTARD, what would the maximum clock be on a 40 volt > > logic swing. > > > > Do you even know what slew rate is? > > > > The reason it was 5 volts is because it was a reasonable voltage > > that could be slewed to at a decent rate. > > > > NOW, we are at 3.3 volts and even 1.2V. The reason is slew rate, > > and the fact that we can transition much faster at those swings than > > we ever could at 5V. > > Here's a clue for you. High clock rates and complex > high density chips have a significant problem with > heat, the main reason for the ever lowering voltages > in CPU's. Long leads, the essence of distributing > heat sources, slows things down significantly. Correct. Power is now the single limiting factor. MassivelyWrong strikes again. > > > There would be no GHz+ Pentiums if we were still at 5 Volt logic > > levels. > > > Getteth thyself a clue. > > Speak to yourself, ProngHead. You have to forgive Dimbulb. He's a tad slow. -- Keith
From: nonsense on 12 Mar 2007 21:46 krw wrote: > In article <c55a1$45f5eebb$49ecfae$14595(a)DIALUPUSA.NET>, > nonsense(a)unsettled.com says... > >>MassiveProng wrote: >> >> >>>On Mon, 12 Mar 2007 14:34:47 +0000 (UTC), kensmith(a)green.rahul.net >>>(Ken Smith) Gave us: >>> >>> >>> >>>>In article <45F4CF7A.BD6428AD(a)hotmail.com>, >>>>Eeyore <rabbitsfriendsandrelations(a)hotmail.com> wrote: >>>>[....] >>>> >>>> >>>>>So Mr Expert. Why isn't TTL made on a 40 Volt process ? >>>> >>>>Thats obvious. Its so there is a market for MOSFET drivers. I still want >>>>a PIC made with Supertex's HV CMOS. >>>> >>> >>> >>> >>> Tell us, oh masterTARD, what would the maximum clock be on a 40 volt >>>logic swing. >>> >>> Do you even know what slew rate is? >>> >>> The reason it was 5 volts is because it was a reasonable voltage >>>that could be slewed to at a decent rate. >>> >>> NOW, we are at 3.3 volts and even 1.2V. The reason is slew rate, >>>and the fact that we can transition much faster at those swings than >>>we ever could at 5V. >> >>Here's a clue for you. High clock rates and complex >>high density chips have a significant problem with >>heat, the main reason for the ever lowering voltages >>in CPU's. Long leads, the essence of distributing >>heat sources, slows things down significantly. > > > Correct. Power is now the single limiting factor. MassivelyWrong > strikes again. > >>> There would be no GHz+ Pentiums if we were still at 5 Volt logic >>>levels. >> >>> Getteth thyself a clue. >> >>Speak to yourself, ProngHead. > > > You have to forgive Dimbulb. He's a tad slow. > And really low voltage at that.
From: Dan Bloomquist on 12 Mar 2007 20:52 MassiveProng wrote: > On Mon, 12 Mar 2007 14:34:47 +0000 (UTC), kensmith(a)green.rahul.net > (Ken Smith) Gave us: > > > Tell us, oh masterTARD, what would the maximum clock be on a 40 volt > logic swing. > > Do you even know what slew rate is? > > The reason it was 5 volts is because it was a reasonable voltage > that could be slewed to at a decent rate. Wow. Sounds like ECL is a tremendous screw up. How could it have ever happened? > NOW, we are at 3.3 volts and even 1.2V. The reason is slew rate, > and the fact that we can transition much faster at those swings than > we ever could at 5V. And all this time I thought TTL's speed bottle neck was the saturated collector. But thanks to you, I understand that the output has to move all the way to the 5 volt rail for true state. Thanks! > There would be no GHz+ Pentiums if we were still at 5 Volt logic > levels. And the Cray I shouldn't have existed.......
From: Dan Bloomquist on 12 Mar 2007 20:54 MassiveProng wrote: > On Mon, 12 Mar 2007 15:41:36 GMT, Dan Bloomquist > <public21(a)lakeweb.com> Gave us: > > >>MassiveProng wrote: >> >>> Note that TTL was the requisite defining element. >> >>No, it is, 'Jihad needs scientists' > > > > Well, now it's: > > You're a goddamned retard, as usual, BloomTARD! As usual? What name were you trolling under at our previous encounter?
From: The Ghost In The Machine on 12 Mar 2007 23:59
In sci.physics, MassiveProng <MassiveProng(a)thebarattheendoftheuniverse.org> wrote on Mon, 12 Mar 2007 16:52:21 -0700 <3mpbv2h1ts0jed1imfmdt5h52ukk3bcskj(a)4ax.com>: > On Mon, 12 Mar 2007 14:34:47 +0000 (UTC), kensmith(a)green.rahul.net > (Ken Smith) Gave us: > >>In article <45F4CF7A.BD6428AD(a)hotmail.com>, >>Eeyore <rabbitsfriendsandrelations(a)hotmail.com> wrote: >>[....] >>>So Mr Expert. Why isn't TTL made on a 40 Volt process ? >> >>Thats obvious. Its so there is a market for MOSFET drivers. I still want >>a PIC made with Supertex's HV CMOS. >> > > > Tell us, oh masterTARD, what would the maximum clock be on a 40 volt > logic swing. > > Do you even know what slew rate is? > > The reason it was 5 volts is because it was a reasonable voltage > that could be slewed to at a decent rate. > > NOW, we are at 3.3 volts and even 1.2V. The reason is slew rate, > and the fact that we can transition much faster at those swings than > we ever could at 5V. > > There would be no GHz+ Pentiums if we were still at 5 Volt logic > levels. > > Getteth thyself a clue. Well, I for one was under the opinion that the reason E = 1.2V is because P = E^2/R and also proportional to the switching frequency of the transistors (since each switch requires a small pulse of current; the more pulses, the higher the power required to switch), and also proportional to the total transistor area, which AFAIK has been largely constant even as we pack more transistors per die. Assuming one can run a chip at both 1.2V and 5V at the same clock rate, the 5V running will run far hotter -- about 17.4 x more power, in fact. Then again, there's a fair number of factors here, not the least of which is process control. :-) A chip, like an airplane, is a bunch of compromises, one of them being clock speed versus power dissipation. The x86 series is an excellent example of a total bodge-up because it compromised so many things (for example, it's still source-code compatible with the 8080A and probably with the Z80 as well!). But it still works. Now, assuming anyone wants an HV CMOS 40V logic swing, I for one would think that the best method of achieving such is through a 1.2V-to-40V swing converter, which presumably would be a carefully-adjusted standard CMOS transistor-pair inverter which flips at about 0.6 volts to ground. The rest of the circuitry can run at 1.2 V without trouble. If necessary the level shifter can feed another, more standard inverter. There might be better solutions; it's been a long time since I've been anywhere near semiconductor designs, and I only really worked with slow-speed digital stuff at most. -- #191, ewill3(a)earthlink.net Useless C++ Programming Idea #1123133: void f(FILE * fptr, char *p) { fgets(p, sizeof(p), fptr); } -- Posted via a free Usenet account from http://www.teranews.com |