Microblaze and DDR2
in [FPGA]
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From: maxascent on 2 Apr 2010 14:57 Is it possible to interface DDR2 memory to a Microblaze processor by not using the MPMC. I have my own DDR controller that I want to use. Cheers Jon --------------------------------------- Posted through http://www.FPGARelated.com
From: Jon Beniston on 2 Apr 2010 16:14 On 2 Apr, 19:57, "maxascent" <maxascent(a)n_o_s_p_a_m.n_o_s_p_a_m.yahoo.co.uk> wrote: > Is it possible to interface DDR2 memory to a Microblaze processor by not > using the MPMC. I have my own DDR controller that I want to use. > Yes - but you might need to write CoreConnect PLB Interface to sit between the two. Jon
From: John McCaskill on 17 Apr 2010 12:33 On Apr 17, 9:48 am, "maxascent" <maxascent(a)n_o_s_p_a_m.n_o_s_p_a_m.yahoo.co.uk> wrote: > I am trying to integrate my own DDR2 controller into a Microblaze > processor. I have created a board support package file with the ports > defined and have added an IOTYPE attribute of XIL_MEMORY_V1. However when I > run the bsb it thinks that I want to use the Xilinx MPMC. Maybe I shouldnt > be adding this attribute, but I need EDK to know that this is a memory > controller so that it will let me change the memory type in the generate > linker script dialog. > > Thanks > > Jon > > --------------------------------------- > Posted throughhttp://www.FPGARelated.com You do not need to specify the IOTYPE as XIL_MEMORY_V1. I set it to something else in our XBD file. In the MPD file for your memory controller, you want to add: OPTION IP_GROUP = Memory Controller See psf_rm.pdf in the doc directory of the EDK install for more information on its syntax. Regards, John McCaskill www.FasterTechnology.com
From: maxascent on 17 Apr 2010 13:49 Thanks John that worked although I had to add ADDR_TYPE = MEMORY to the C_BASEADDR and C_HIGHADDR parameters. Jon --------------------------------------- Posted through http://www.FPGARelated.com
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