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From: Pete Fraser on 2 Apr 2010 19:55
I'm doing a design in a XC3S250E, using ISE 10.1.03.
For some reason my generic dual-port RAM (with
synchronous read) seems to be inferred as distributed.
I'm fairly sure that a slightly earlier version of the design
worked OK, but I don't know what has changed.

I have "RAM extraction" checked, and "RAM Style"
set to "Auto". [I can't set "RAM Style" to "Block"
because the design also has a small register file with
asynchronous read.]

I tried the ram_style attribute, but can't work out what
syntax ISE is expecting.

I tried:

attribute ram_style: string;
attribute ram_style of my_ram : ram_dp_s is "block";

in the architecture that used the ram_dp_s, but it didn't
like that (or any other variants I tried).

Any thoughts?

Thanks

Pete





From: Patrick Maupin on 2 Apr 2010 20:05
On Apr 2, 6:55 pm, "Pete Fraser" <pfra...(a)covad.net> wrote:
> I'm doing a design in a XC3S250E, using ISE 10.1.03.
> For some reason my generic dual-port RAM (with
> synchronous read) seems to be inferred as distributed.
> I'm fairly sure that a slightly earlier version of the design
> worked OK, but I don't know what has changed.
>
> I have "RAM extraction" checked, and "RAM Style"
> set to "Auto". [I can't set "RAM Style" to "Block"
> because the design also has a small register file with
> asynchronous read.]
>
> I tried the ram_style attribute, but can't work out what
> syntax ISE is expecting.
>
> I tried:
>
> attribute ram_style: string;
> attribute ram_style of my_ram : ram_dp_s is "block";
>
> in the architecture that used the ram_dp_s, but it didn't
> like that (or any other variants I tried).
>
> Any thoughts?

The XST manual has working examples of dual port RAM. I usually start
with one of those and incrementally change it to what I want, backing
up if it breaks.

One thing to be wary of is that (at least some versions of ISE) do not
like both the RAM ports to be in the same always block.

Regards,
Pat
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