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From: jozamm@gmail.com on 30 Mar 2006 01:02 Hi ppl, I need to program sevetal PAL's and GAL's in an educational enviroment. I will be using a hobbyist programmer to do the programming as i do not need any large volumes. What software is available to enter the logic equations and compile to the fuse file? Does any schematic entry software exist which one can enter the schemtic and compule to the fuse map? Any sort of help on PAL's and GAL's would be greatly appeciated. Joseph Zammit Malta
From: Joel Kolstad on 30 Mar 2006 01:30 <jozamm(a)gmail.com> wrote in message news:1143698526.209430.15360(a)i40g2000cwc.googlegroups.com... > What software is available to enter the logic equations and compile to > the fuse file? Does any schematic entry software exist which one can > enter the schemtic and compule to the fuse map? I suggest you visit www.latticesemi.com. They're one of the few programmable logic vendors around who still makes GALs (aka "SPLDs," for "simple programmable logic devices"); most other vendors (Altera, Xilinx, etc.) start out with CPLDs (complex PLDs), which are just larger & fancier. All the PLD vendors have a free version of their software which will work with their smaller devices (and "smaller" is still millions of gates!) Some of the software may still support schematic entry, but truth be told, you're largely much wasting your time using it. PLD design these days is done using hardware description languages such as Verilog and VHDL; your time is much better spent learning them. (Somewhat ironically, though, most design tools now support a graphical means of assigning schematic symbols to HDL code, and the tool they generates the code that merely connects signals between the various bits of code!) > Any sort of help on PAL's and GAL's would be greatly appeciated. I'd suggest you do a little Googling for "programmable logic tutorial" or similar. Get a demo board with a CPLD on it and play around; many demo boards are <$50 and you can re-program the CPLD to your heart's content using, e.g., a PC's parallel port connection. > Joseph Zammit > Malta Hmm... Malta, huh? OK, getting a demo board might be a little harder. I'd volunteer to send you one I had (it contained a Xilinx 9572, I believe), but unfortunately I tossed it out years ago. If you ask nicely there's a good chance someone around here will have one they're willing to part with, though. BTW, another good newsgroup for these kinds of queries is comp.arch.fpga (which is what CPLDs turn into when they lose their AND-OR array fixation and turn into a sea of a bazillion little look-up tables). ---Joel Kolstad
From: Paul Burke on 30 Mar 2006 02:05 jozamm(a)gmail.com wrote: > What software is available to enter the logic equations and compile to > the fuse file? Does any schematic entry software exist which one can > enter the schemtic and compule to the fuse map? What level education is it (school or university)? If the latter, I'd take the plunge and go straight for one of the free HDL development systems. Perhaps for beginners, Verilog would be easier than VHDL which is quirky to say the least. And there are loads of examples available on opencores.org. For the device, perhaps Xilinx Coolrunner, which are a bit small at the affordable level. One disadvantage of this route is that the tools are baroque, and it seems that the developers don't talk to each other. Students could spend as much time getting the tools to behave as they do learning about the devices and logic. If you really want the simplicity of FPGAs, something like CUPL or OPAL could be used. They used to be free, but I doubt their availability from manufactureres now. If you want to go down this route, mail me and I can send you OPALjr or one of the early Lattice schematic based ones (though licensing might be a problem for the latter). You can use GAL or PALCE devices- the fuse map is the same. Paul Burke
From: Jim Granville on 30 Mar 2006 02:16 jozamm(a)gmail.com wrote: > Hi ppl, > > I need to program sevetal PAL's and GAL's in an educational enviroment. > I will be using a hobbyist programmer to do the programming as i do not > need any large volumes. > > What software is available to enter the logic equations and compile to > the fuse file? Does any schematic entry software exist which one can > enter the schemtic and compule to the fuse map? > > Any sort of help on PAL's and GAL's would be greatly appeciated. You do not mention the packages, but DIP20/24 pin SPLDs are available from: ATMEL : ATF16V8BQL, ATF22V10QCQZ, ATF750CL http://www.atmel.com/dyn/products/param_table.asp?family_id=653&OrderBy=part_no&Direction=ASC Software: WinCUPL, smallish in size, compiles Boolean Equations. If you have problems programming those, the next step is PLCC44, and the ATF1502ASL are JTAG-ISP and 5V,with low cost JTAG cables available. Lattice: GAL and ispGAL variants, tend to have high Icc at 5V variants. Their lead-free coverage is thin at the SPLD end. Software: Part of their larger FPGA offering, so it is a large download. Anachip PEEL series http://www.anachip.com/eng/product/pld.php Software : WinPLACE, smallish in size, Boolean equation entry. Older SW : PALASM still exists in some corners of the net, but the supported devices list is now ancient. Schematics: Not really worth it, with 8/10/32 macrocells, a text editor is probably the fastest entry - and you'll need one anyway to view the report logs. Programming: If you can find a commercial programmer, most of those support VECTOR test of programmed PLDs. -jg
From: Deefoo on 30 Mar 2006 02:32
"Jim Granville" <no.spam(a)designtools.co.nz> wrote in message news:442b85c1(a)clear.net.nz... > jozamm(a)gmail.com wrote: > > Hi ppl, > > > > I need to program sevetal PAL's and GAL's in an educational enviroment. > > I will be using a hobbyist programmer to do the programming as i do not > > need any large volumes. > > > > What software is available to enter the logic equations and compile to > > the fuse file? Does any schematic entry software exist which one can > > enter the schemtic and compule to the fuse map? > > > > Any sort of help on PAL's and GAL's would be greatly appeciated. > > You do not mention the packages, but DIP20/24 pin SPLDs are available from: > > ATMEL : ATF16V8BQL, ATF22V10QCQZ, ATF750CL > http://www.atmel.com/dyn/products/param_table.asp?family_id=653&OrderBy=part_no&Direction=ASC > > Software: WinCUPL, smallish in size, compiles Boolean Equations. > If you have problems programming those, the next step is > PLCC44, and the ATF1502ASL are JTAG-ISP and 5V,with > low cost JTAG cables available. > > Lattice: GAL and ispGAL variants, tend to have high Icc at > 5V variants. > Their lead-free coverage is thin at the SPLD end. > > Software: Part of their larger FPGA offering, so it is a large > download. > > Anachip PEEL series > http://www.anachip.com/eng/product/pld.php > Software : WinPLACE, smallish in size, Boolean equation entry. > > Older SW : PALASM still exists in some corners of the net, but the > supported devices list is now ancient. > > Schematics: Not really worth it, with 8/10/32 macrocells, > a text editor is probably the fastest entry - and you'll need > one anyway to view the report logs. > > Programming: If you can find a commercial programmer, most of > those support VECTOR test of programmed PLDs. > > -jg > I recently dug out PALASM to modify a GAL and it still works fine with my Lattice GALs (22V10D). It will only run under real DOS though. Here it is: http://www.engr.uky.edu/~melham01/ee481/software.htm --DF |