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From: oparr on 15 May 2010 19:27
> first hit on google:http://www.smps.us/pcbtracespacing.html

Been there done that on 5/1/2010 to be exact. Values are too inflated
IMO.

On May 15, 6:15 pm, "langw...(a)fonz.dk" <langw...(a)fonz.dk> wrote:
>
From: oparr on 15 May 2010 19:44
This table is close to the one in OP;

http://www.smpspowersupply.com/ipc2221pcbclearance.html

but are they trustworthy? Values too low?


On May 15, 7:27 pm, "op...(a)hotmail.com" <op...(a)hotmail.com> wrote:
>
From: krw on 15 May 2010 19:48
On Sat, 15 May 2010 14:51:56 -0700 (PDT), a7yvm109gf5d1(a)netzero.com wrote:

>On May 15, 10:05�am, "op...(a)hotmail.com" <op...(a)hotmail.com> wrote:
>> A certain trace spacing guideline is indicating a minimum requirement
>> of .005" spacing for voltages up to 100VDC for soldermasked traces. Is
>> that correct? Any caveats?
>
>Are you sure that wasn't 0.5mm?

If that were the case you'd never get a trace between BGA pads, making them
rather useless.
From: oparr on 15 May 2010 20:21
More confusion;

"It is interesting to note that many major power supply manufacturers
in their low-power designs are widely using 500-600V MOSFETs in TO220
package operating at 400V and higher. With this package you can have
about 30 mils spacing between the pads while IPC would require at
least 100 mils. Even if you spread the leads on the PCB, you can't do
anything with 50-mil spacing between the TO220 leads along the surface
of the package."

The above underscores the "inexact science" at work here. Rather than
follow some table or rule, it probably makes more sense to follow what
some tried and true product has been able to get away with. I'm
inclined to believe what is said in the link below since that G320
product has been around for about ten years.

http://finance.groups.yahoo.com/group/geckodrive/message/4674


On May 15, 7:44 pm, "op...(a)hotmail.com" <op...(a)hotmail.com> wrote:
>
From: linnix on 15 May 2010 22:55
On May 15, 4:48 pm, "k...(a)att.bizzzzzzzzzzzz"
<k...(a)att.bizzzzzzzzzzzz> wrote:
> On Sat, 15 May 2010 14:51:56 -0700 (PDT), a7yvm109gf...(a)netzero.com wrote:
> >On May 15, 10:05 am, "op...(a)hotmail.com" <op...(a)hotmail.com> wrote:
> >> A certain trace spacing guideline is indicating a minimum requirement
> >> of .005" spacing for voltages up to 100VDC for soldermasked traces. Is
> >> that correct? Any caveats?
>
> >Are you sure that wasn't 0.5mm?
>
> If that were the case you'd never get a trace between BGA pads, making them
> rather useless.

Why would you run 100V DC between BGA pads?
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