Root Cause of FDC6303N FET drain and gate short circuit?
in [Design]
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From: SoothSayer on 30 Jun 2010 10:39 On Wed, 30 Jun 2010 04:53:20 -0700 (PDT), Myauk <aungkokothet(a)gmail.com> wrote: >Hi all, > >In a typical PCBA design which consists of relay driver circuit, we >found the FET drain and gate short circuit problem causing damage to >MCU DIOs due to excessive sink current in production on 5 or 6 failed >out of 100 PCBA units. > >Circuit Configuration is as follows: > >The relay driver circuit consists of MCU DIO driving directly to the >gate of FDC6303N. >The Drain is connected to relay coil of internal resistance 86 ohms. >The realy is safely freewhelled with S1MB Diode. >The source is connected to ground. >The supply for the relay is 5V, >the MCU DIO is operating at 3.3V, >CMOS totempole output has maximum sinking current of 15mA. > >The problem is obviously due to the shorted gate and drain of FDC6303N >however my questions here are, > >1. Is it possible that there are defective FETs with alreadyshorted >gate and drain from the new lot of FETs catered for Production? If you cannot test each FET prior to assembly, you cannot blame the lot. You *should* test a good "spc" like sample from what you buy, and if more than a certain number fails, you reject the entire lot back to the vendor. If that level of testing is not feasible, then post-assembly testing MUST be used to determine the failure mode in a NON-destructive way so that the failed units can have that part trade out without causing any proximal circuit failures, keeping the unit in the loop with less repair requisite. >2. Or is there any possible fault condition which can cause a good >working FET to have gate and drain shorted? Hand assembly, yes. Maintain strict ESD handling procedures. Automated assembly, less likely. One must be careful to observe ESD practices and procedures when loading the pick and place machine, AND when receiving, inspecting, handling, stocking, and disbursement of the parts as well. ESD can cause prime pass yield problems that are hard to nail down. Re-examine and strengthen your ESD policies and procedures where you may need to.
From: SoothSayer on 30 Jun 2010 10:43 On Wed, 30 Jun 2010 07:08:31 -0700 (PDT), Myauk <aungkokothet(a)gmail.com> wrote: >On Jun 30, 10:03�pm, John Larkin ><jjlar...(a)highNOTlandTHIStechnologyPART.com> wrote: >> On Wed, 30 Jun 2010 04:53:20 -0700 (PDT), Myauk >> >> >> >> >> >> <aungkokot...(a)gmail.com> wrote: >> >Hi all, >> >> >In a typical PCBA design which consists of relay driver circuit, we >> >found the FET drain and gate short circuit problem causing damage to >> >MCU DIOs due to excessive sink current in production on 5 or 6 failed >> >out of 100 PCBA units. >> >> >Circuit Configuration is as follows: >> >> >The relay driver circuit consists of MCU DIO driving directly to the >> >gate of FDC6303N. >> >The Drain is connected to relay coil of internal resistance 86 ohms. >> >The realy is safely freewhelled with S1MB Diode. >> >The source is connected to ground. >> >The supply for the relay is 5V, >> >the MCU DIO is operating at 3.3V, >> >CMOS totempole output has maximum sinking current of 15mA. >> >> >The problem is obviously due to the shorted gate and drain of FDC6303N >> >however my questions here are, >> >> >1. Is it possible that there are defective FETs with alreadyshorted >> >gate and drain from the new lot of FETs catered for Production? >> >> >2. Or is there any possible fault condition which can cause a good >> >working FET to have gate and drain shorted? >> >> >Regards >> >> Wow. The fet is rated for 0.68 amps, 25 volts, and it's all zener >> gate/ESD protected. You are running it at 5 volts and 60 mA. There's >> no way it should fail. >> >> Are they dead at turnon? >> >> Are you buying the parts from an official distributor? >> >> John- Hide quoted text - >> >> - Show quoted text - > >They are already dead at turn on. We found it while we carried out the >relay circuit operation test, MCU reset issue while controlling relay >on/off. > >Regards Does your turn on test send a DC pulse? If so, how do you generate that pulse? Could it be a 'hard start' issue? In other words, make sure the DC you send to the unit for your tests do not initiate at too high a slew rate. A 'soft start' as the industry calls it. I still think it may be an ESD issue, since the design works fine for all the other units and the failed units are not circuit use failures, but apparently failed devices prior to any use at all.
From: Myauk on 30 Jun 2010 12:04 On Jun 30, 10:20 pm, "tm" <nob...(a)msnbc.org> wrote: > "Myauk" <aungkokot...(a)gmail.com> wrote in message > > news:6c14ccac-9a18-43a5-9f05-b08e6d0c9fce(a)w15g2000pro.googlegroups.com... > On Jun 30, 9:58 pm, "tm" <nob...(a)msnbc.org> wrote: > > > > > "Myauk" <aungkokot...(a)gmail.com> wrote in message > > >news:cc5dfca7-d7fd-4f9d-809a-9d5948063ca1(a)y32g2000prc.googlegroups.com.... > > On Jun 30, 9:38 pm, Winfield Hill <Winfield_mem...(a)newsguy.com> > > wrote: > > > > Myauk wrote... > > > > > In a typical PCBA design which consists of relay driver circuit, we > > > > found the FET drain and gate short circuit problem causing damage to > > > > MCU DIOs due to excessive sink current in production on 5 or 6 failed > > > > out of 100 PCBA units. > > > > 2. Or is there any possible fault condition which can cause a good > > > > working FET to have gate and drain shorted? > > > .But I think it is not really a design issue. We have already added > > .freewheeling diode verifying the back emf is already eliminated by > > .checking the waveforms. And 10k Gate resistor is there. So there is no > > .way possibly to damage the FET. > > . > > .Does anyone have similar experience? > > . > > .Thanks and Best Regards > > > If you have a 10k gate resistor, how is it killing the DIO? > > .Current from 5 V supply through relay is approximately 60mA sinking > .into the LOW Dio pin rated at 15mA. (4 times the rated value). > > Then there is something you are not telling us. From your two comments, you > say the > MCU DIO pin connects to the fet through a 10k resistor. If the fet shorts to > 5 volts > (g to d), then the max current can be 0.5 mA. I=E/R= 5/10000=0.0005 > > Maybe you need to draw us a picture. > > T 10k resistor is the parallel pull down resistor between gate and source of FET. There is no resistance, the DIO directly drives the FET Gate. Regards
From: Jan Panteltje on 30 Jun 2010 14:13 On a sunny day (Wed, 30 Jun 2010 09:04:55 -0700 (PDT)) it happened Myauk <aungkokothet(a)gmail.com> wrote in <8df2da5f-1ece-4004-b896-acd3e68c06cc(a)s24g2000prs.googlegroups.com>: >10k resistor is the parallel pull down resistor between gate and >source of FET. > >There is no resistance, the DIO directly drives the FET Gate. > >Regards Please note that it is not sufficient to just have the diode over the relay, you ALSO must decouple the power rail at that point, else the drain will spike way above the supply when the relay turns of, via the trace impedance and whatever wires there are before you get the power supply. And also add a small gate resistor *in series* please. Sometimes a small (few nF) capacitor between drain and source can bring down possible very high frequency oscillations that may also happen.
From: tm on 30 Jun 2010 14:31
"Myauk" <aungkokothet(a)gmail.com> wrote in message news:8df2da5f-1ece-4004-b896-acd3e68c06cc(a)s24g2000prs.googlegroups.com... On Jun 30, 10:20 pm, "tm" <nob...(a)msnbc.org> wrote: > "Myauk" <aungkokot...(a)gmail.com> wrote in message > > news:6c14ccac-9a18-43a5-9f05-b08e6d0c9fce(a)w15g2000pro.googlegroups.com... > On Jun 30, 9:58 pm, "tm" <nob...(a)msnbc.org> wrote: > > > > > "Myauk" <aungkokot...(a)gmail.com> wrote in message > > >news:cc5dfca7-d7fd-4f9d-809a-9d5948063ca1(a)y32g2000prc.googlegroups.com... > > On Jun 30, 9:38 pm, Winfield Hill <Winfield_mem...(a)newsguy.com> > > wrote: > > > > Myauk wrote... > > > > > In a typical PCBA design which consists of relay driver circuit, we > > > > found the FET drain and gate short circuit problem causing damage to > > > > MCU DIOs due to excessive sink current in production on 5 or 6 > > > > failed > > > > out of 100 PCBA units. > > > > 2. Or is there any possible fault condition which can cause a good > > > > working FET to have gate and drain shorted? > > > .But I think it is not really a design issue. We have already added > > .freewheeling diode verifying the back emf is already eliminated by > > .checking the waveforms. And 10k Gate resistor is there. So there is no > > .way possibly to damage the FET. > > . > > .Does anyone have similar experience? > > . > > .Thanks and Best Regards > > > If you have a 10k gate resistor, how is it killing the DIO? > > .Current from 5 V supply through relay is approximately 60mA sinking > .into the LOW Dio pin rated at 15mA. (4 times the rated value). > > Then there is something you are not telling us. From your two comments, > you > say the > MCU DIO pin connects to the fet through a 10k resistor. If the fet shorts > to > 5 volts > (g to d), then the max current can be 0.5 mA. I=E/R= 5/10000=0.0005 > > Maybe you need to draw us a picture. > > T ..10k resistor is the parallel pull down resistor between gate and ..source of FET. .. ..There is no resistance, the DIO directly drives the FET Gate. .. ..Regards I would at least put a small resistance, say 100 ohms or so, in series with the gate to PIO pin. I'm not sure why you need the pull down as the MCU should drive it ok. Unless the MCU three states the pin prior to completing the reset. What bypassing are you using in the circuit? MCU? Fet? Regards, T |