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From: fab. on 20 Oct 2009 06:54
Dear All,

I have a Spartan 3A-DSP 3400A board
http://www.xilinx.com/products/devkits/HW-SD3400A-DSP-DB-UNI-G.htm


and a licence for the ISE System Edition.

I am trying to implement the simple stop watch tutorial at page 19 of
the ISE In-depth tutorial at here:
http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/ise11tut.pdf

Unfortunately at page 35 I get stack because the Digital Clock Manager
"Single DCM_SP" does not seem to be available, see screenshot here:
http://topo.epfl.ch/research/indoor_nav/prj_rep/uploads/FpgaRadioPrj/DCM_problem.png


Can somebody please help me out by telling me how to proceed on this
tutorial? am I making a mistake by using a DCM_SP? is this a problem
with my license? unfortunately I have googled this problem in all
possible ways but I found no solution.

best regards
fabrizio

From: fab. on 21 Oct 2009 11:11
On Oct 20, 6:55 pm, "maxascent" <maxasc...(a)yahoo.co.uk> wrote:
> I have ISE 11.1 and the DCM does exist in the coregen for this release. Is
> it not in your version of coregen or is it grayed out? Your image doesnt
> seem to work.
>
> Jon        
>
> ---------------------------------------        
> This message was sent using the comp.arch.fpga web interface onhttp://www..FPGARelated.com

Hi there,
Not sure it will help but I had a similar problem in the past. In my
case was cause by me, at the beginning of the project creation,
choosing the right FPGA device but in version Automotive. Meaning
"Automotive Spartan 3A" instead of "Spartan 3A" . Doind so all IP
models in CORE gen were grayed out.
Suggestion: make sure you chose the right FPGA device when you start
you project in ISE.
cheers
fab.
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